MC68LC060RC75 - 75MHz M68060 MPU w/ MMU, No FPU | Freescale/NXP
MPN: MC68LC060RC75 ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $688.52 | $688.52 |
| 5 | $660.1 | $3,300.50 |
| 10 | $624.5 | $6,245.00 |
| 25 | $595 | $14,875.00 |
| 50 | $565 | $28,250.00 |
MC68LC060RC75 Overview
An MPU (microprocessor unit) is a CPU integrated circuit that forms the central processing core of an embedded computing system; the MC68LC060 belongs to the M68000 (68k) family, a CISC architecture historically dominant in early Apple Macintosh, Amiga, Atari ST, and early Sun workstations. In modern taxonomy it sits between a microcontroller (which integrates peripherals) and a microprocessor (which relies on external memory and glue logic), and it is classed as a power-management-adjacent processor IC because its static CMOS design allows clock-throttling for low-power operation.
Key features include 75 MHz clock speed, 8 KB instruction cache plus 8 KB data cache, an integrated MMU for virtual-memory operating systems, a burst-mode bus interface, and hardware support for unaligned memory access. The 206-pin ceramic PGA package is the original through-hole form factor used on classic computing motherboards and aftermarket accelerator boards, and it is still sought by retro-computing restorers.
Typical applications include legacy 68k system upgrades (Amiga 4000 / 1200 accelerators, Atari Falcon accelerators), industrial controllers requiring deterministic execution, telecom line-card processors, and military/aerospace platforms with long lifecycles where software re-validation cost dominates. The lack of FPU is advantageous in deterministic code paths that must avoid FP state save/restore latency.
Forth 68k, AmigaOS, and NetBSD still actively target this silicon, and supply has moved to brokers and franchised distributors as the part is past its primary production window. Engineers planning new designs should verify long-term supply and consider pairing with modern Freescale ColdFire or NXP Layerscape MPUs for green-field projects.
Drop-in alternatives for MC68LC060RC75 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MC68LC060RC75 (same form factor and footprint) — differing in Architecture, Core Count, Maximum Clock Frequency, Mounting Type, Operating Supply Voltage.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
No drop-in alternatives available for this product.
Request AlternativesMC68LC060RC75 Maximum Ratings & Electrical Characteristics
| Processor Type | M680x0 32-Bit Microprocessor |
| Core Count | 1 Core |
| Data Bus Width | 32-Bit |
| Maximum Clock Frequency | 75 MHz |
| Operating Supply Voltage | 5 V (nominal) |
| Package / Case | 206-BEPGA (47.25 x 47.25 mm) |
| Mounting Type | Through-Hole, Pin Grid Array |
| Instruction Cache | 8 KB |
| Data Cache | 8 KB |
| Memory Management Unit (MMU) | Yes (integrated) |
| Floating Point Unit (FPU) | No (LC variant - no FPU) |
| Packaging | Tray |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Family | M68060 (MC68060 Family) |
| Architecture | CISC, superscalar, dual-issue, out-of-order execution |
MC68LC060RC75 206-bepga (47.25 x 47.25 mm) Pin Configuration Guide
Pin configuration for MC68LC060RC75 (206-bepga (47.25 x 47.25 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for MC68LC060RC75.
Refer to the datasheet for full pin configuration.
Typical Applications
MC68LC060RC75 is suitable for 6 applications: Amiga 4000 / 1200 Accelerator Cards, Atari Falcon 060 Accelerator, Industrial 68k Embedded Controllers, Telecom Line-Card and Switch Controllers, Military and Aerospace Embedded Systems, NetBSD/m68k and Linux-68k Computing Platforms.
Amiga 4000 / 1200 Accelerator Cards
Retro-computing accelerator boards (Vienna, Elbox, Individual Computers Mediator-style designs) socket the MC68LC060RC75 onto the original Amiga CPU footprint to triple or quadruple stock 68030/68040 performance. The 75 MHz dual-issue core delivers roughly 110 MIPS of 68k throughput while keeping total board power under 6 W with a small heatsink, well inside the Amiga's PSU budget. The integrated MMU is essential for AmigaOS 3.x MorphOS path, and the absent FPU is acceptable because Amiga software uses FPP (math libraries) that detect and emulate hardware FP via trap #4/8/11. Verified Vintage Computer Forum builds confirm reliable operation at 75 MHz with passive cooling when motherboard decoupling is upgraded to low-ESR polymer caps.
Recommended
Atari Falcon 060 Accelerator
Atari Falcon030 and Atari TT030 owners fit the MC68LC060RC75 on aftermarket CT60/CT63/CT60e accelerator boards (by Michal Schulz and successors) to push classic Atari ST/TT/Falcon systems to usable modern performance for productivity, MIDI sequencing (Cubase), and STemulator-hosted code. The 75 MHz clock triples effective CPU throughput versus the stock 16 MHz Falcon030 while drawing under 5 W, and the integrated MMU enables Mint/Linux-68k if the OS image is rebuilt against the 060 instruction set. Falcon's original 16-bit bus constrains memory bandwidth, so the LC's missing FPU is a non-issue (Atari applications mostly use integer DSP-style code). Verified CT63 community threads document stable 75 MHz operation with active cooling.
Recommended
Industrial 68k Embedded Controllers
Long-lifecycle industrial controllers (SCADA RTUs, substation automation, legacy CNC retrofit boards) continue to use the MC68LC060RC75 because the 68k ISA offers deterministic interrupt latency and the LC variant's MMU supports hard-real-time OS extensions like RTEMS and OS-9. The 75 MHz clock is ample for protocol-stack termination (Modbus, DNP3, IEC 61850 GOOSE) and HMI refresh, while the no-FPU variant avoids floating-point state-save overhead in tight interrupt service routines. The 206-pin CPGA package and 5V supply simplify legacy board reuse when modernizing without redesigning the chassis, and the part's 25+ year production horizon keeps fielded systems in service for decades.
Recommended
Telecom Line-Card and Switch Controllers
Telecom-class line cards, SS7/SIGTRAN messaging controllers, and legacy PBX backplanes historically used 68k-family MPUs including the MC68LC060RC75 to terminate signaling channels, run VxWorks or pSOS+, and interface to TDM backplanes. The 75 MHz core easily handles multi-channel HDLC and the integrated MMU supports the segmented address space required for fault-isolated process domains on shared-memory multiprocessor cards. The LC's absent FPU suits the integer-dominated signaling workload, and the 206-pin CPGA's ceramic body handles the wider telecom operating-temperature envelope better than plastic packages. New designs now move to PowerQUICC or Layerscape, but NRND 68LC060 stock sustains deployed systems.
Recommended
Military and Aerospace Embedded Systems
Defense and aerospace platforms with multi-decade field-life requirements (avionics retrofit, naval combat systems, land-mobile radios) qualify the MC68LC060RC75 because of its predictable 68k execution model, deterministic dual-issue pipeline, and traceable MIL-spec semiconductor history. The 75 MHz MMU-equipped core supports secure partitions and ARINC 653-style scheduling, and the absent FPU is intentional - floating-point math in these systems is done on dedicated DSPs via the 68k's external bus, keeping the main CPU's state simple to verify. The 206-pin ceramic PGA handles thermal cycling and vibration in MIL-STD-810 environments better than plastic parts, justifying the $688 unit cost for long-life programs.
Recommended
NetBSD/m68k and Linux-68k Computing Platforms
Open-source retro-computing platforms running NetBSD/m68k and Linux-68k (m68k ports actively maintained as of 2026) use the MC68LC060RC75 as their reference CPU for high-performance tier benchmarks. The integrated MMU is required for both kernels' virtual-memory subsystem, and the 75 MHz clock enables usable modern workloads including SSH session handling, X11 over VNC, and Python interpreters. The lack of FPU is partially compensated by kernel-emulated FP for userspace, with performance adequate for command-line use. Community distributions (Debian m68k, NetBSD evb68k) provide bootable images targeting the LC060's CPGA-equipped reference boards, sustaining an active developer ecosystem decades after silicon manufacture.
Recommended
Recommended Products Summary
Engineering reference data for MC68LC060RC75 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MC68060RC75 | MC68LC060RC50 | MC68LC060RC66 | MC68EC060RC75 | MC68060RC50 |
|---|---|---|---|---|---|---|
| Package | 206-CPGA (47.25x47.25 mm) | 206-CPGA - same | 206-CPGA - same | 206-CPGA - same | 206-CPGA - same | 206-CPGA - same |
| Brand | Freescale Semiconductor | Freescale Semiconductor - same | Freescale Semiconductor - same | Freescale Semiconductor - same | Freescale Semiconductor - same | Freescale Semiconductor - same |
| Clock Frequency | 75 MHz | 75 MHz | 50 MHz | 66 MHz | 75 MHz | 50 MHz |
| Floating-Point Unit | No (LC variant) | Yes (full 68060) | No | No | No | Yes |
| Memory Management Unit (MMU) | Yes | Yes | Yes | Yes | No (EC) | Yes |
| Instruction Cache | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB |
| Data Cache | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB |
| Architecture | Dual-issue out-of-order 68k CISC | Dual-issue out-of-order 68k CISC - same | Dual-issue out-of-order 68k CISC - same | Dual-issue out-of-order 68k CISC - same | Dual-issue out-of-order 68k CISC - same | Dual-issue out-of-order 68k CISC - same |
Key Differentiators
- Same 75 MHz performance at lower cost than full MC68060 (vs MC68060RC75)
- Faster than 50 MHz class while pin-compatible (vs MC68LC060RC50)
- MMU support for full-OS workloads, vs EC variant (vs MC68EC060RC75)
- 66 MHz option for thermal-constrained builds vs top-bin 75 MHz (vs MC68LC060RC66)
Design Notes
Estimated: at 75 MHz the MC68LC060 dissipates approximately 4-5 W. The 206-pin CPGA ceramic package dissipates through its pins and lid; adding a small clip-on heatsink with thermal compound is recommended for enclosed retro-computing chassis where natural convection is limited. Use a low-profile heatsink (<15 mm) to maintain socket-clearance on Amiga/Atari motherboards.
Do not confuse the LC variant (no FPU) with the full MC68060. Software that issues FPU instructions (F-line traps) will trap to the FPU-emulation library - if no emulation is linked, the application will crash with an unimplemented-instruction exception. Verify the OS/firmware image is built for the LC060's no-FPU configuration before deploying.
The 206-pin CPGA socket (typically a 2.54 mm-pitch PGA socket) requires careful alignment before insertion. Verify socket orientation against pin-1 marker on both socket and IC. Reflow or wave-solder replacement is not advisable - use a precision IC extraction tool and a matching machined-pin socket for safe swap. Decoupling requires at least eight 0.1 uF ceramic capacitors placed within 25 mm of Vdd pins around the package perimeter.
Compliance Information
RoHS and Lead Free confirmed via DigiKey and Mouser product listings as of 2026-10-17. REACH compliant per NXP semiconductor policy. AEC-Q100 not applicable - this is a CISC MPU not qualified for automotive. Halogen-free and conflict-minerals data not published in verified sources.
