PN5321A3HN-C10655 - NFC/RFID Transceiver IC 13.56MHz I2C/SPI/UART | NXP
MPN: PN5321A3HN-C10655 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $9.36 | $9.36 |
| 10 | $8.95 | $89.50 |
| 100 | $8.12 | $812.00 |
| 500 | $7.4 | $3,700.00 |
| 1,000 | $6.85 | $6,850.00 |
PN5321A3HN-C10655 Overview
An NFC (Near Field Communication) controller is a short-range wireless transceiver that operates on the 13.56 MHz ISM band and implements the ISO 14443 / ISO 18092 protocol stack to enable contactless data exchange between a reader and a card, peer device, or NFC tag. As a category, NFC controllers fall under RFID (radio frequency identification) read/write ICs, which sit within the broader wireless transceiver hierarchy and ultimately under the RF & wireless semiconductor taxonomy. The PN532 sits near the top of this hierarchy because it integrates an entire contactless front-end including the analog demodulator, RF transmitter, host interface controllers, and on-chip microcontroller — typically only the external antenna and matching network are left to the designer.
Key features of the PN5321A3HN include on-chip antenna driver stages, hardware-accelerated data framing/verification, selectable I2C / SPI / UART host interfaces for flexible host MCU connectivity, integrated demodulator and decoder for both 100% ASK and 10% ASK modulation, and a true hardware low-power wake-up function that periodically polls the RF field and minimizes idle current. The 13.56 MHz carrier frequency is compliant with ISO/IEC 14443-A/B, ISO/IEC 18092 (NFCIP-1), FeliCa, and the MIFARE Classic / MIFARE Ultralight / NTAG tag families, giving designers a single-chip solution for most 13.56 MHz contactless ecosystems.
The device architecture pairs an 80C51-compatible MCU core for command processing with dedicated contactless front-end analog blocks, exposing its registers and ISO/IEC 14443-3 frame handling over the host-selected serial interface. Designers typically treat the PN532 as an attached peripheral offloaded to a host microcontroller, sending ADPU frames via I2C/SPI/UART and receiving interrupts on detected targets or collisions. The HVQFN-40 exposed-pad package exposes a thermal pad that should be soldered to a continuous ground plane to dissipate heat from the RF output stage during continuous transmit.
Typical applications include contactless point-of-sale terminals, handheld NFC readers and writers, NFC-enabled microcontroller breakout boards, public-transit and electronic-ticket readers, access-control key fob readers, and asset-tracking or inventory RFID writers. The 2.7 V to 5.5 V supply range also makes the part compatible with both 3.3 V microcontrollers and 5 V legacy systems.
When designing with this device, route the antenna traces as a controlled-impedance 50-ohm differential loop on the PCB and add the required EMC matching components as specified in the application circuit. Always tie the exposed thermal pad to a low-impedance ground plane and respect the host-interface logic-level constraints when connecting to a 3.3 V MCU. Confirm the firmware driver matches the chosen bus mode (I2C / SPI / UART) before bringing up the reader, because mode setting differs between the variants of the PN532 firmware family.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for PN5321A3HN-C10655 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PN5321A3HN/C106;55
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN/C106,51
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN/C106518
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN-C10655 Specifications
| Manufacturer | NXP Semiconductors |
| Part Family | PN532 |
| Function | NFC/RFID Reader/Transponder IC |
| Operating Frequency | 13.56 MHz |
| Supported Protocols | ISO 14443 A/B, ISO 18092 (NFC), FeliCa, MIFARE |
| Air Interface Data Rates | 106 kbit/s; 212 kbit/s; 424 kbit/s |
| Supply Voltage Range | 2.7 V to 5.5 V |
| Operating Supply Current | 12 uA (low-power wake-up mode, per datasheet snapshot) |
| Host Interfaces | I2C, SPI, UART |
| Core | 80C51 microcontroller core |
| Operating Temperature Range | -25 C to +85 C |
| Package | 40-pin HVQFN Exposed Pad |
| Mounting Type | Surface Mount |
| Lead Free / RoHS | Lead free, RoHS compliant |
| Tray Packaging | Tray (per datasheet summary) |
| Power Dissipation | 0.5 W (typical) |
PN5321A3HN-C10655 40-pin hvqfn exposed pad Pin Configuration Guide
Pin configuration for PN5321A3HN-C10655 (40-pin hvqfn exposed pad package). Pin numbering, functions, and connection diagrams are defined in the manufacturer datasheet. Refer to it for the exact footprint and soldering guidelines.
No detailed pinout data available for PN5321A3HN-C10655.
Refer to the datasheet for full pin configuration.
Typical Applications
PN5321A3HN-C10655 is suitable for 6 applications: Contactless Point-of-Sale Terminals, Handheld NFC Reader / Writer Modules, NFC-Enabled Microcontroller Breakout Boards, Access Control / Key-Fob Reader Heads, Public-Transit and E-Ticket Readers, Asset-Tracking and Inventory RFID Writers.
Contactless Point-of-Sale Terminals
The NXP PN5321A3HN-C10655 sits at the heart of contactless payment terminals thanks to its integrated support for ISO 14443 Type A/B at 106/212/424 kbit/s and FeliCa air-frames. The 2.7 V to 5.5 V supply range lets the same BOM service both battery-powered mPOS readers and powered countertop terminals without changing the regulator chain. The exposed thermal pad on the 40-pin HVQFN package channels heat from the RF transmit stage into the chassis ground plane, sustaining continuous read attempts during transaction bursts. Hardware low-power wake-up at roughly 12 uA idle current lets the terminal sleep between taps and wake fast enough to satisfy sub-300 ms user-perceived tap response.
Recommended
Handheld NFC Reader / Writer Modules
The PN5321A3HN-C10655 is a common choice for handheld battery-powered NFC readers that need to inventory tags, write MIFARE Ultralight/NTAG records, or pair with phones over NFCIP-1 peer-to-peer mode. The 80C51 core runs the contactless stack on-chip, freeing the host MCU to focus on UI, BLE, and Wi-Fi coordination. Selectable I2C / SPI / UART host interfaces make the part compatible with low-cost Cortex-M host MCUs as well as higher-end i.MX application processors. With roughly 12 uA idle current and a built-in hardware wake-on-field function, the reader can sit in deep sleep and still respond when a tag enters range.
Recommended
NFC-Enabled Microcontroller Breakout Boards
The PN5321A3HN-C10655 has become a de-facto reference NFC controller on popular hobbyist breakout boards (Adafruit PN532, etc.) because it exposes I2C and SPI ports to a host MCU over a 6-pin right-angle header. Designers prototyping NFC tap-and-go applications can plug the part into an Arduino, Raspberry Pi, or ESP32 host over the same physical bus. The 3.3 V-tolerant host-interface logic also lets 5 V Arduino boards drive the part via a simple logic-level translator. The combination of documented driver libraries (libnfc, Adafruit_PN532) and the predictable 13.56 MHz front-end accelerates rapid prototyping.
Recommended
Access Control / Key-Fob Reader Heads
The PN5321A3HN-C10655's ISO 14443 A/B and MIFARE Classic support makes it well suited for physical access-control reader heads mounted next to doors and turnstiles. The integrated Crypto-1 stream cipher and standard MIFARE authentication command sequence handle authenticated card reads directly in hardware. A continuous RF-field mode can keep the antenna energized for fast credential reads when a user taps the reader. The exposed thermal pad on the 40-pin HVQFN package provides a path for heat dissipation into the metal housing of the reader head, supporting long-duty-cycle operation in high-traffic lobbies.
Recommended
Public-Transit and E-Ticket Readers
The PN5321A3HN-C10655 reads FeliCa (Suica, PASMO, Octopus) and ISO 14443 (MIFARE DESFire, Calypso) ticketing tokens, which is critical for public-transit e-ticket readers deployed across rail, bus, and toll stations. Because FeliCa uses a different modulation/coding scheme from ISO 14443, the integrated multi-protocol front-end saves a designer from stacking two transceiver ICs. The 2.7 V to 5.5 V supply range lets the same BOM run off a battery-backed system or a 5 V main rail in an outdoor validator. A hardware low-power wake-up function reduces idle current when the turnstile is unused.
Recommended
Asset-Tracking and Inventory RFID Writers
The PN5321A3HN-C10655 acts as an NFC writer in industrial asset-tracking applications where items are tagged with NTAG or MIFARE Ultralight labels and need to be written/inspected during provisioning. The on-chip 80C51 core handles ISO 14443-3 frame sequencing and NTAG memory-write commands without host intervention, freeing the host MCU for barcode scan fusion and database sync. The exposed thermal pad on the 40-pin HVQFN package helps when the part must run continuous write cycles across many tagged items in rapid succession. Designers can leverage the second UART host interface to bridge to industrial RS-485 gateway logic.
Recommended
Recommended Products Summary
Engineering reference data for PN5321A3HN-C10655 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PN5321A3HN/C106;55 | PN5321A3HN/C106,51 | PN5321A3HN/C106518 |
|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors (Rochester Electronics stocking) |
| Package | 40-pin HVQFN Exposed Pad | 40-pin HVQFN Exposed Pad - same | 40-pin HVQFN Exposed Pad - same | 40-pin HVQFN Exposed Pad - same |
| Operating Frequency | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz |
| Supply Voltage Range | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V |
| Host Interfaces | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART |
| Core | 80C51 MCU core | 80C51 MCU core | 80C51 MCU core | 80C51 MCU core |
| Protocols | ISO 14443 A/B, ISO 18092, FeliCa, MIFARE | Same protocol stack | Same protocol stack | Same protocol stack |
| Firmware Designator | 55 | 55 (slash designator) | 51 | 518 |
| Operating Temperature | -25 C to +85 C | -25 C to +85 C | -25 C to +85 C | -25 C to +85 C |
Key Differentiators
- Firmware designator 55 vs 51 vs slash-separator variant (vs PN5321A3HN/C106,51)
- Cross-package alternative (TRF7970A) uses a 32-VQFN footprint, not drop-in (vs TRF7970ARHBR)
- Bundle 12 uA hardware low-power wake-on-field (vs PN5321A3HN/C106518 (Rochester stocking variant))
Design Notes
Route the two TX1 / TX2 antenna lines as a matched differential 50-ohm loop and place the EMC filter caps and matching network as close to the IC pins as physically possible. The exposed thermal pad under the 40-pin HVQFN package MUST be soldered to a continuous low-impedance ground pour (no thermal relief spokes) so that ground-return currents from the RF transmitter stay short and the pad acts as a heat spreader. Keep the digital host-interface lines (I2C / SPI / UART) on the opposite side of the PCB from the antenna traces to avoid feeding common-mode noise into the host MPU.
Place a 100 nF X7R decoupling capacitor as close as possible to each VCC pin, plus a bulk 4.7 uF to 10 uF tantalum or ceramic capacitor within 5 mm of the IC, to keep the supply stable when the RF transmitter is keyed on. The PN532 draws brief but sharp current spikes during transmit; undersized bulk capacitance will couple ripple back into the analog demodulator and degrade receiver sensitivity. Power the part from a low-noise LDO rather than a switching regulator if the system rail feeds any noise-sensitive analog stages downstream.
Common pitfalls include: (1) choosing the wrong firmware designator (51 vs 55 vs 518) for the host-side driver library — always confirm before burn-in; (2) floating the IRQ pin — the host will not get wake-on-field events if the IRQ line is not actively pulled up to VCC; (3) treating /C106,55 and /C106;55 as different parts when they are functionally identical (only the slash separator differs); (4) using the wrong antenna inductance for the target reader range — too high an inductance narrows the field, too low an inductance dissipates heat in the matching network.
At 13.56 MHz with a 14 MHz fundamental carrier, the receiver can be desensitized by harmonics injected from a nearby switching DC-DC converter. Keep at least 4 mm of clearance between the antenna loop and any high-di/dt power trace, and add a Pi filter (LC) on the supply rail feeding the PN532 if a switching regulator is required nearby. EMI from the on-card-reader handshake can also couple into nearby audio amplifiers and sensor front-ends; bundle the antenna cable in twisted-pair or coax routing when the antenna is remoted off-board.
Compliance Information
RoHS compliant / lead free per NXP product-page snippet and LCSC packaging note. AEC-Q100 status confirmed not qualified (commercial -25 C to +85 C range). REACH, halogen-free, and conflict-minerals status not explicitly stated in the provided web data — set to unknown.
