PS5026-E26 - PCIe 5.0 NVMe SSD Controller | PHISON
MPN: PS5026-E26 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0 | $0.00 |
| 10 | $0 | $0.00 |
| 100 | $0 | $0.00 |
| 500 | $0 | $0.00 |
| 1,000 | $0 | $0.00 |
PS5026-E26 Overview
A PCIe 5.0 NVMe SSD controller is the device inside an SSD that coordinates the host interface, NAND flash, DRAM cache, error correction, and storage-management functions. The PS5026-E26 belongs to the PCIe storage-controller hierarchy: PCIe 5.0 interface, x4 link, NVMe protocol, and client SSD controller. Its 14 GB/s maximum sequential throughput is intended to remove the storage bottleneck in data-intensive workloads such as game loading, large-file transfers, and workstation data preparation.
The controller is manufactured using TSMC's 6 nm process according to the SSD Wiki result. Published reference-design information identifies performance configurations up to 14 GB/s read, 12 GB/s write, 1,500K read IOPS, and 2,000K write IOPS. One distributor result lists a configuration rated at 12,000 MB/s read and 10,000 MB/s write, while the manufacturer brochure describes the broader E26 solution reaching up to 14 GB/s. These figures describe the associated SSD platform and should not be treated as guaranteed sequential throughput for every finished drive.
The E26 reference designs use an M.2 2280 form factor and a PCIe 5.0 x4 connection. Published material also identifies 232-layer TLC NAND in an engineering-sample 2 TB SSD, demonstrating how the controller can be integrated with external NAND rather than providing a complete SSD by itself. System designers must therefore qualify the NAND, DRAM, firmware, thermal solution, power delivery, and enclosure around the controller.
For gaming systems, the controller's high sequential bandwidth can reduce transfer waits when loading large game assets. Workstations benefit when handling large project files, caches, and temporary data. NVMe enclosure and SSD developers can use the E26 as the basis for high-end client drives, provided that thermal dissipation and power management meet the controller's published temperature limits.
The main design trade-off is that PCIe 5.0 performance requires careful signal integrity, power delivery, and thermal design. A finished SSD must maintain the specified operating range while sustaining the advertised workload, rather than relying only on short benchmark bursts. This page combines verified manufacturer information, reference-design data, technical entity context, and application guidance for PS5026-E26 evaluation.
Drop-in alternatives for PS5026-E26 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PS5026-E26
✅ Drop-In✓ In Stock
Contact for price
View Datasheet →PS5026-E26
✅ Drop-In✓ In Stock
Contact for price
View Datasheet →PS5026-E26
✓ In Stock
Contact for price
View Datasheet →PS5026-E26
✅ Drop-In✓ In Stock
Contact for price
View Datasheet →PS5026-E26
✅ Drop-In✓ In Stock
Contact for price
View Datasheet →PS5026-E26 Maximum Ratings & Electrical Characteristics
| Product Type | Client-grade PCIe 5.0 x4 NVMe SSD controller |
| PCI Express Generation | PCIe 5.0 |
| PCI Express Lane Width | x4 |
| Maximum Sequential Throughput | 14 GB/s |
| Reference-Design Sequential Read | 14 GB/s |
| Reference-Design Sequential Write | 12 GB/s |
| Reference-Design Read IOPS | 1,500K |
| Reference-Design Write IOPS | 2,000K |
| Process Technology | TSMC 6 nm |
| Operating Temperature | 0°C to 70°C |
| Storage Form Factor | M.2 2280 reference design |
| PCI Vendor ID | 1987 |
| PCI Device ID | 5026 |
| Protocol | NVMe |
| Controller Class | Client SSD controller |
| NAND Integration | External NAND integration required |
| DRAM Cache | External DRAM cache support in reference designs |
PS5026-E26 standard Pin Configuration Guide
Pin configuration for PS5026-E26 (standard package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for PS5026-E26.
Refer to the datasheet for full pin configuration.
Typical Applications
PS5026-E26 is suitable for 7 applications: High-performance gaming SSD, Workstation cache SSD, Content-creation NVMe SSD, PCIe 5.0 gaming desktop, High-end portable workstation storage, AI data-ingestion SSD, PCIe 5.0 M.2 2280 enclosure.
High-performance gaming SSD
The PS5026-E26 fits a gaming SSD that needs more storage bandwidth than ordinary client PCIe 4.0 designs. Its verified PCIe 5.0 x4 interface and platform throughput up to 14 GB/s can shorten transfers of large game installations, texture libraries, and compressed asset bundles. The controller is used with external NAND and SSD firmware rather than as a complete drive. Designers should verify sustained read behavior, thermal rise, power management, and host compatibility. A cooling solution must keep the finished SSD within the verified 0°C to 70°C operating range while maintaining the advertised PCIe 5.0 link.
Recommended
Workstation cache SSD
The PS5026-E26 is suitable for a workstation SSD used for project files, media caches, temporary render data, and other bandwidth-intensive storage. Its verified PCIe 5.0 x4 interface and up to 14 GB/s platform throughput provide a high-bandwidth foundation for workloads that move large files repeatedly. The SSD designer must still qualify NAND endurance, sustained write behavior, thermal throttling, power-loss protection, and the workstation's NVMe driver stack. Reference-design figures of up to 12 GB/s write and 2,000K write IOPS provide useful targets, but actual workstation performance depends on the complete SSD and host workload.
Recommended
Content-creation NVMe SSD
The PS5026-E26 can serve in an NVMe SSD for video editing, image libraries, and content-production systems that exchange large files between storage and host memory. The verified PCIe 5.0 x4 link and up to 14 GB/s throughput can help reduce transfer time, while the reference design's reported 12 GB/s write capability supports high-rate ingest workloads. Firmware must be tuned for the selected NAND and sustained-write profile. Thermal design, capacitor placement, power sequencing, and enclosure airflow should be validated together because a fast interface cannot compensate for an unstable power rail or an overheated SSD.
Recommended
PCIe 5.0 gaming desktop
The PS5026-E26 is appropriate for a PCIe 5.0 gaming desktop storage subsystem when the motherboard exposes a compatible M.2 slot and the system is designed for Gen5 signal integrity. Its verified x4 interface and throughput up to 14 GB/s align with the bandwidth needs of a high-end client platform. The SSD designer must confirm lane configuration, power limits, boot behavior, and thermal dissipation with the system integrator. The controller's 0°C to 70°C specification sets an important validation envelope; a desktop enclosure without effective heat spreading may reduce sustained performance or trigger protection behavior.
Recommended
High-end portable workstation storage
The PS5026-E26 can be used in a high-end portable workstation enclosure when the enclosure supports PCIe 5.0 x4, adequate power delivery, and sustained cooling. Its verified storage bandwidth can support large project transfers without moving to an external SATA interface. Portable systems have less thermal headroom than desktops, so the controller, NAND, and SSD controller board should be tested in the intended enclosure across the specified operating range. The supplied results describe M.2 2280 reference designs, but enclosure compatibility still requires mechanical, electrical, and thermal qualification.
Recommended
AI data-ingestion SSD
The PS5026-E26 is suitable for an SSD used to ingest large datasets before AI training, preprocessing, or model-loading operations. The verified PCIe 5.0 x4 interface and up to 14 GB/s platform throughput can shorten sequential data movement, while the reference design's 1,500K read IOPS figure supports high-throughput access patterns. Actual benefit depends on dataset size, filesystem behavior, host memory bandwidth, and NAND selection. SSD validation should include sustained read, queue-depth behavior, thermal stability, and power-loss recovery so a data-ingestion workload does not degrade during prolonged transfers.
Recommended
PCIe 5.0 M.2 2280 enclosure
The PS5026-E26 can be integrated into a PCIe 5.0 M.2 2280 enclosure that exposes the controller's x4 link to a host system. Verified reference-design material directly associates the controller with M.2 2280 SSDs, but the finished enclosure must still meet PCIe signal-integrity and power-delivery requirements. Layout review should cover controlled-impedance routing, connector and launch behavior, decoupling, thermal vias, heat-spreader contact, and the specified 0°C to 70°C operating range. This is a controller-selection use case, not an assertion that any off-the-shelf M.2 enclosure is automatically compatible.
Recommended
Engineering reference data for PS5026-E26 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PS5026-E26 |
|---|---|---|
| Product Type | Client-grade PCIe 5.0 x4 NVMe SSD controller | Same target designation; no qualified substitute established |
| PCI Express Interface | PCIe 5.0 x4 | PCIe 5.0 x4 target specification |
| Maximum Platform Throughput | 14 GB/s | 14 GB/s platform target |
| Reference Read Throughput | 14 GB/s | 14 GB/s |
| Reference Write Throughput | 12 GB/s | 12 GB/s |
| Process Technology | TSMC 6 nm | TSMC 6 nm |
| Operating Temperature | 0°C to 70°C | 0°C to 70°C |
| Brand | PHISON Electronics Corp. | PHISON Electronics Corp. |
Key Differentiators
- PCIe 5.0 x4 client-storage positioning (vs Generic PCIe 4.0 SSD controller)
- Reference platform throughput target (vs Completed SSD using unspecified controller)
- 6 nm controller process (vs Unspecified process technology)
- M.2 2280 reference-design association (vs Controller without a verified M.2 reference design)
Design Notes
Treat the PCIe 5.0 power architecture as a complete design problem rather than a simple connector upgrade. Validate the controller, NAND, DRAM, and PHY power rails for sequencing, voltage tolerance, transient current, decoupling, and power-loss recovery. Place high-frequency decoupling close to the relevant supply pins and verify the rail behavior under both burst transfers and sustained sequential workloads. The supplied data does not provide pin-level power values, so use the manufacturer electrical documentation before finalizing the PCB.
Use the verified 0°C to 70°C controller range as a validation target, not as a guaranteed enclosure temperature. Measure the controller and NAND under sustained 14 GB/s-class operation, because reference-design throughput can produce more heat than short benchmarks. A heat spreader, thermal vias, copper area, and enclosure airflow should be evaluated together. If the SSD throttles or enters protection, reduce workload, improve cooling, or revisit NAND and firmware selection before qualifying the product.
PCIe 5.0 x4 requires controlled-impedance routing, short high-speed connections, careful connector or pad transitions, and power-and-ground return paths that support the intended signal rate. Review lane length matching, loss, vias, stubs, and test access with the board stack-up in place. The supplied sources identify the interface as PCIe 5.0 x4 but do not provide a public pinout or layout guideline, so obtain the manufacturer design guidance before release to fabrication.
Do not confuse the PS5026-E26 controller with a complete SSD or assume that its advertised throughput applies to every NAND configuration. Validate NAND support, DRAM requirements, firmware behavior, endurance, capacity layout, and power-loss protection in the finished drive. The verified sources describe reference designs and platform targets rather than a universal finished-product guarantee. Confirm package pinout and ordering information directly with PHISON because those details are not available in the supplied public data.
Compliance Information
The supplied sources do not state RoHS, REACH, AEC-Q100, lead-free, halogen-free, or conflict-minerals status for PS5026-E26. Automotive qualification is not established, so aec_q100 is marked not_applicable for the supplied evidence rather than qualified.
