SN74AUP1G32DCKR - Single 2-Input OR Gate, 0.8-3.6V AUP | Texas Instruments
MPN: SN74AUP1G32DCKR ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.42 | $0.42 |
| 10 | $0.36 | $3.60 |
| 100 | $0.28 | $28.00 |
| 500 | $0.22 | $110.00 |
| 1,000 | $0.18 | $180.00 |
| 3,000 | $0.14 | $420.00 |
SN74AUP1G32DCKR Overview
An OR gate is a fundamental combinational logic building block that outputs a HIGH state whenever any of its inputs is HIGH; it sits within the broader Boolean logic IC hierarchy as one of the seven primitive gates and is foundational for implementing sum-of-products expressions, control signal arbitration, and discrete decision logic in digital systems. The AUP sub-family is optimized for battery-powered portable applications where leakage current dominates total power budget, providing CMOS-equivalent speed at one to two orders of magnitude lower static consumption than standard HC/HCT logic.
Key features of the SN74AUP1G32DCKR include a propagation delay of approximately 3.4 ns typical at 3.3 V VCC (load-dependent), partial-power-down support via Ioff circuitry that prevents back-drive current when the device is unpowered, over-voltage tolerant inputs that accept signals up to 3.6 V regardless of VCC, low input capacitance of 1.5 pF typical for reduced dynamic loading, and ±10% VCC overshoot/undershoot immunity on switching edges. The push-pull CMOS output stage eliminates the need for external pull-up resistors required by open-drain alternatives, simplifying PCB layout.
The AUP1G32 architecture uses a single-stage OR topology with internal buffering to ensure consistent output drive strength across the full VCC range. Its sub-1 uA ICC at 25 °C makes it among the lowest-leakage single-gate OR functions available, while the Ioff feature enables safe insertion into mixed-voltage rails and partial-power-down subsystems without latch-up.
Typical applications include handheld consumer electronics, battery-powered sensor front-ends, IoT edge nodes, wearable devices, low-power MCUs as a logic-level adapter, and any compact PCB where a single discrete OR function is required alongside a multi-channel logic IC. Designers frequently pair the AUP1G32 with 1.8 V microcontrollers such as the MSP430 or SimpleLink families for status-flag combination, interrupt arbitration, and power-rail selection gating.
When designing with this part, observe 3.6 V as the absolute maximum VCC and avoid DC loading on inputs above VCC; for high-speed paths above 50 MHz, verify propagation delay under actual load capacitance rather than relying on the typical datasheet figure.
This page synthesizes distributor pricing, drop-in alternatives (same-package, pin-compatible), and practical design notes that are not aggregated on the manufacturer datasheet, enabling faster sourcing and replacement decisions for production engineers.
Drop-in alternatives for SN74AUP1G32DCKR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with SN74AUP1G32DCKR (same form factor and footprint) — differing in Logic Family, Logic Type, Operating Temperature, Output Type, Package.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
SN74AUP1G32DCKT
✅ Drop-In📋 Reference alternative (not in catalog)
SN74AUP1G32DCKRE4
✅ Drop-In📋 Reference alternative (not in catalog)
SN74AUP1G32DCKTE4
✅ Drop-In📋 Reference alternative (not in catalog)
SN74AUP1G32DCKR
✅ Drop-In✓ In Stock
$0.14 / Unit
View Datasheet →SN74AUP1G04DCKR
✅ Drop-In✓ In Stock
$0.09 / Unit
View Datasheet →SN74AUP1G32DCKR Maximum Ratings & Electrical Characteristics
| Logic Type | OR Gate |
| Number of Circuits | 1 |
| Number of Inputs per Circuit | 2 |
| Logic Family | AUP (Advanced Ultra-low-Power) |
| Supply Voltage (VCC) | 0.8 V to 3.6 V |
| Quiescent Current (ICC max) | 0.9 uA |
| Output Type | Push-Pull CMOS |
| Output Current (IOH/IOL) | 4 mA typical at 1.8 V VCC |
| Propagation Delay (tpd) | Approximately 3.4 ns typical at 3.3 V VCC |
| Input Capacitance | 1.5 pF typical |
| Power Dissipation Capacitance (Cpd) | 4.3 pF typical at 3.3 V |
| Operating Temperature | -40 C to +85 C |
| Package | SC-70-5 (DCK) 5 pins |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| Ioff (Partial Power Down) | Supported |
| Input Over-Voltage Tolerance | Up to 3.6 V |
SN74AUP1G32DCKR Pin Configuration
| Pin 1 | NC — No internal connection (package lead spacing) |
| Pin 2 | 1A — Input A of the 2-input OR gate |
| Pin 3 | GND — Ground reference |
| Pin 4 | 1B — Input B of the 2-input OR gate |
| Pin 5 | 1Y — OR-gate output (1Y = A OR B) |
Typical Applications
SN74AUP1G32DCKR is suitable for 6 applications: Battery-Powered IoT Sensor Node, Wearable Fitness Tracker Logic, Handheld Medical Monitor Status Arbiter, Industrial Sensor Transmitter Logic, Consumer Remote Control Keypad Encoder, Low-Power Display Backlight Controller.
Battery-Powered IoT Sensor Node
The SN74AUP1G32DCKR is well suited for combining alarm flags and sensor-OK signals in coin-cell powered IoT nodes, where its 0.9 uA max ICC preserves battery capacity during deep-sleep cycles. The 0.8-3.6 V VCC range aligns with single-cell Li-ion, CR2032, and energy-harvester outputs without level shifters. Placed near the MCU's GPIO interrupt pins, it allows any-of-three sensor conditions to wake the host; its Ioff feature prevents back-drive current when the SoC rail is off, and 1.5 pF input capacitance avoids measurable dynamic loading of high-impedance sensor outputs. Compared to a discrete diode-resistor OR network, the AUP1G32 provides clean logic thresholds, no forward-voltage drop, and 3.4 ns propagation at 3.3 V for time-critical wake events.
Recommended
Wearable Fitness Tracker Logic
In wristband fitness devices, the SN74AUP1G32DCKR combines heart-rate and motion interrupt requests before forwarding them to a 1.8 V ARM Cortex-M0+ MCU, saving a precious GPIO pin for additional sensing. Its 0.8 V minimum VCC allows operation directly from a partially discharged Li-ion cell, extending device runtime. Push-pull CMOS outputs eliminate the pull-up resistor that an open-drain OR would require, saving both PCB area and quiescent leakage across the 100 kohm range. Sub-1 uA ICC contributes negligibly to the 30 mAh typical battery budget, and the SC-70-5 footprint occupies less than 2.5 mm squared, fitting within the dense mixed-signal layouts of modern wearables.
Recommended
Handheld Medical Monitor Status Arbiter
The SN74AUP1G32DCKR is commonly deployed in portable medical monitors (pulse oximeters, glucose meters) to combine battery-low, sensor-disconnect, and out-of-range alerts into a single host interrupt. Its 0.8-3.6 V operation matches both the 3 V lithium primary cells and the 1.8 V SoC rails used in this segment, eliminating the need for separate voltage translation. Push-pull output drive at 4 mA (1.8 V) is sufficient to wire directly to the SoC interrupt pin over a 50 mm trace without buffer stages. The Ioff feature prevents fault currents if the battery is hot-swapped while the SoC rail remains energized, a critical safety property for IEC 60601-1 compatible designs.
Recommended
Industrial Sensor Transmitter Logic
In 4-20 mA loop-powered and IO-Link sensor transmitters, the SN74AUP1G32DCKR combines limit-switch and diagnostic inputs before forwarding them to a low-power MSP430 or SimpleLink host MCU. Operating across the industrial -40 C to +85 C range and tolerating input transients up to 3.6 V regardless of VCC, it survives the ESD and surge events common on factory-floor wiring when paired with appropriate external TVS protection. Its 3.4 ns typical propagation at 3.3 V is well below the millisecond-scale response times of industrial protocol stacks, and the SC-70-5 footprint fits within the tight 6 mm x 8 mm transmitter PCB typical of M12-head-mounted designs.
Recommended
Consumer Remote Control Keypad Encoder
The SN74AUP1G32DCKR can OR multiple key-press events in remote-control keypads before they reach the encoder IC, allowing n-key rollover emulation in low-cost designs. The 0.8 V minimum VCC supports single AAA-cell operation through end-of-life discharge down to 0.9 V, extending remote battery life. Sub-1 uA quiescent current contributes under 1% of the 50 uA standby budget typical of coin-cell remotes, and push-pull output avoids the pull-up current that open-drain OR gates impose. The 5-pin SC-70-5 footprint fits within the slim 1.6 mm keypad housing while leaving room for the IR LED driver and encoder IC on the same flex PCB.
Recommended
Low-Power Display Backlight Controller
The SN74AUP1G32DCKR combines dimming-control and ambient-light interrupt signals in OLED/LCD backlight controllers where any of two events must enable the LED driver. Operating at 3.3 V VCC directly from the display's main rail, the part's push-pull output drives the enable pin of a TPS61161 or similar LED driver IC without additional buffering. Sub-microamp ICC preserves standby power when the display is off, and the 4 mA output drive comfortably exceeds the 1 mA typical logic-level input of LED drivers. The SC-70-5 footprint supports the dense PCB layouts of smartphone secondary displays and smartwatch always-on screens.
Recommended
Recommended Products Summary
Engineering reference data for SN74AUP1G32DCKR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | SN74AUP1G32DCKT | SN74AUP1G32DCKRE4 | SN74AUP1G32DCKTE4 | SN74AUP1G32DCKR (UMW) | SN74AUP1G04DCKR |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | UMW (TECH PUBLIC) | Texas Instruments |
| Package | SC-70-5 (DCK) | SC-70-5 (DCK) - same | SC-70-5 (DCK) - same | SC-70-5 (DCK) - same | SC-70-5 (DCK) - same | SC-70-5 (DCK) - same |
| Logic Function | 2-Input OR Gate | 2-Input OR Gate | 2-Input OR Gate | 2-Input OR Gate | 2-Input OR Gate | Single Inverter (different function) |
| VCC Range | 0.8 V to 3.6 V | 0.8 V to 3.6 V | 0.8 V to 3.6 V | 0.8 V to 3.6 V | 0.8 V to 3.6 V | 0.8 V to 3.6 V |
| Quiescent Current (ICC max) | 0.9 uA | 0.9 uA | 0.9 uA | 0.9 uA | 0.9 uA | 0.9 uA |
| Output Type | Push-Pull CMOS | Push-Pull CMOS | Push-Pull CMOS | Push-Pull CMOS | Push-Pull CMOS | Push-Pull CMOS |
| Ioff (Partial Power Down) | Supported | Supported | Supported | Supported | Supported | Supported |
| Propagation Delay (3.3 V VCC) | Approximately 3.4 ns typical | Approximately 3.4 ns typical | Approximately 3.4 ns typical | Approximately 3.4 ns typical | Approximately 3.4 ns typical | Approximately 3.4 ns typical |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Reel Quantity | 3000 pieces | 250 pieces | 3000 pieces | 250 pieces | 3000 pieces | 3000 pieces |
Key Differentiators
- Sub-microamp quiescent current in 5-pin SC-70-5 (vs SN74LVC1G32DBVR)
- Wide 0.8-3.6 V VCC range covers all low-voltage rails (vs SN74AUP1G04DCKR)
- Ioff partial-power-down support prevents back-drive current (vs Older AUP1G00 (non-Ioff AUP family))
Design Notes
Estimated: at 3.3 V VCC and 1 MHz switching with 4.3 pF Cpd, dynamic current consumption is approximately Cpd x VCC^2 x f = 4.3e-12 x 10.89 x 1e6 = ~47 uA, while ICC max static is 0.9 uA. For battery-budgeted designs, average current is dominated by switching activity, not quiescent draw. To minimize average current in low-duty-cycle applications, gate unused inputs to VCC or GND (never leave floating) to prevent the AUP1G32 input stage from oscillating and adding dynamic current.
Place the SN74AUP1G32DCKR close to the signal source to minimize trace capacitance, which directly impacts propagation delay. For high-speed paths above 10 MHz, keep input traces under 25 mm and add a 33 ohm series resistor near the driver to dampen ringing. Provide a 0.1 uF ceramic bypass capacitor within 5 mm of the VCC pin; for designs switching >10 pF loads, increase the bypass to 1 uF. The SC-70-5 exposed lead frame provides adequate thermal dissipation for the part's sub-1 uA operation - no copper pour required.
Do not exceed 3.6 V on VCC under any condition, including transient overshoot from upstream DC-DC converters; the AUP1G32 is not 5 V tolerant on VCC (only on inputs). Ensure unused inputs are tied to VCC or GND, never floating - floating AUP inputs can drift into the linear region and oscillate, drawing excessive current. The Ioff feature protects downstream circuits but only blocks current through the output stage, not through the input; if the input is driven above VCC by more than 3.6 V, add an external series resistor to limit input current to within spec.
The push-pull output of the SN74AUP1G32DCKR can produce ground-bounce and VCC-bounce transients when multiple gates switch simultaneously. Estimated: with 4 mA drive and 50 pF load, di/dt during the transition can reach ~100 mA/ns, causing 100-300 mV bounce on poorly-decoupled VCC rails. To minimize this, place a 0.1 uF X7R bypass capacitor adjacent to VCC pin, use a wide ground trace, and avoid routing the SC-70-5 output trace near sensitive analog signals. For multi-channel systems, stagger output transitions or insert 10-22 ohm series resistors on each output to limit di/dt.
Compliance Information
RoHS and REACH compliant per TI product page. Not AEC-Q100 qualified - this is commercial-grade logic, not automotive. Lead-free (Pb-free) finish confirmed by E4 part number suffixes. Conflict-minerals declaration per TI corporate policy.
