SN74LVC157APWRE4 - Quad 2:1 Mux 16-TSSOP | Texas Instruments
MPN: SN74LVC157APWRE4 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.78 | $0.78 |
| 10 | $0.62 | $6.20 |
| 100 | $0.45 | $45.00 |
| 500 | $0.33 | $165.00 |
| 1,000 | $0.26 | $260.00 |
| 2,000 | $0.22 | $440.00 |
SN74LVC157APWRE4 Overview
A multiplexer (MUX) is a combinational logic device that routes one of several input signals to a single output line under control of a select input; in the broader taxonomy it sits beneath data selectors, encoders, and the general category of digital logic ICs within Integrated Circuits > Logic ICs. The 74LVC family extends classic 74-series HC logic to lower supply voltages with TTL-compatible input thresholds and CMOS-compatible low-power outputs, simplifying level shifting between legacy 5 V sections and modern low-voltage cores.
Key specifications include four 2:1 mux channels, an active-LOW common strobe/EN input, a propagation delay typically under 5 ns at 3.3 V, and ±24 mA output drive at 3.3 V enabling direct connection to heavily loaded buses. Inputs tolerate 5.5 V even when VCC is as low as 1.65 V, allowing down-translation from 5 V sources. The TSSOP-16 package is pin-compatible with the 74HC157 and 74AHC157 legacy families, simplifying board reuse.
Architecturally, the LVC157 uses standard CMOS pass-transistor selection with an output buffer; static power consumption is dominated by leakage (typical ICC < 10 uA), and partial-power-down is supported via Ioff to prevent back-drive on powered-down rails. This makes the part useful in mixed-voltage systems where segments may be unpowered.
Typical applications include data routing in microcontroller-to-peripheral buses, address decoding in memory-mapped systems, signal steering in test equipment, and resource sharing on analog front ends where one ADC channel serves multiple sensors. Industrial temperature grade (-40 C to +85 C) and LVC noise immunity suit factory-floor environments.
When designing with the SN74LVC157A, ensure the common strobe (pin 15) is tied low when normal muxing is required; an unused strobe input must not be left floating. For high-speed buses, place a 0.1 uF decoupling capacitor within 5 mm of the VCC pin to limit VCC bounce during simultaneous-output switching.
This page consolidates verified distributor pricing, drop-in alternatives in the same TSSOP-16 footprint, and practical design guidance drawn from manufacturer application references, giving engineers a one-stop reference beyond the manufacturer datasheet PDF.
Drop-in alternatives for SN74LVC157APWRE4 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
SN74LVC157APWR
✅ Drop-In📋 Reference alternative (not in catalog)
SN74LVC157APWREP
✅ Drop-In📋 Reference alternative (not in catalog)
74LVC157APW,118
✅ Drop-In📋 Reference alternative (not in catalog)
MC74LCX157
✅ Drop-In📋 Reference alternative (not in catalog)
74LVC157APW-Q100
✅ Drop-In📋 Reference alternative (not in catalog)
SN74LVC157APWRE4 Maximum Ratings & Electrical Characteristics
| Function | Quadruple 2-line to 1-line data selector/multiplexer |
| Number of Channels | 4 |
| Configuration | 4 x 2:1 |
| Logic Family | 74LVC |
| Supply Voltage (VCC) | 1.65 V to 3.6 V |
| Input Voltage Tolerance | 5.5 V (over-voltage tolerant inputs) |
| Output Type | True (non-inverted), CMOS push-pull |
| Output Drive (IOH/IOL at 3.3 V) | +/-24 mA |
| Operating Temperature | -40 C to +85 C |
| Package | TSSOP-16 (PW) |
| Mounting Type | Surface Mount |
| MSL Level | 1 (unlimited at <30 C / 85% RH) |
| Lead-Free / RoHS | Yes / Compliant (Pb-free finish, RoHS) |
| Common Select Input | Yes (shared across 4 channels) |
| Strobe / Enable Input | Active-LOW, shared |
| Partial-Power-Down (Ioff) | Yes (per LVC family feature) |
SN74LVC157APWRE4 Pin Configuration
| Pin 1 | 1S — Select input for multiplexer 1 (active HIGH selects B input) |
| Pin 2 | 1A — Channel 1, input A |
| Pin 3 | 1B — Channel 1, input B |
| Pin 4 | 1Y — Channel 1, true (non-inverted) output |
| Pin 5 | 2A — Channel 2, input A |
| Pin 6 | 2B — Channel 2, input B |
| Pin 7 | 2Y — Channel 2, true output |
| Pin 8 | GND — Ground reference |
| Pin 9 | 3Y — Channel 3, true output |
| Pin 10 | 3B — Channel 3, input B |
| Pin 11 | 3A — Channel 3, input A |
| Pin 12 | 4Y — Channel 4, true output |
| Pin 13 | 4B — Channel 4, input B |
| Pin 14 | 4A — Channel 4, input A |
| Pin 15 | E — Active-LOW strobe / enable (shared, tie LOW for normal muxing) |
| Pin 16 | VCC — Supply voltage (1.65 V to 3.6 V) |
Typical Applications
SN74LVC157APWRE4 is suitable for 6 applications: Microcontroller Peripheral Routing, Address Decoding in Memory-Mapped Systems, Test Equipment Signal Steering, Industrial Bus Sharing and Resource Multiplexing, Audio Signal Source Selection, Communication Protocol Fan-Out and Bridging.
Microcontroller Peripheral Routing
The SN74LVC157APWRE4's four independent 2:1 multiplexers and 1.65 V-3.6 V VCC range make it ideal for routing signals between a low-voltage MCU and multiple peripheral sources. Operating from 3.3 V, its +/-24 mA output drive connects directly to heavily loaded digital buses, while 5.5 V tolerant inputs permit down-translation from a legacy 5 V peripheral. Place one mux per switched GPIO with a shared select input driven by an MCU control pin, then add a 0.1 uF decoupling cap within 5 mm of VCC. The TSSOP-16 footprint occupies less than 30 mm^2, fitting easily between MCU and peripheral pads.
Recommended
Address Decoding in Memory-Mapped Systems
The SN74LVC157APWRE4 efficiently expands address-line selection by routing between two decoded regions, freeing higher-order address bits for other functions. With its typical propagation delay below 5 ns at 3.3 V, the device preserves timing margins in address pipelines feeding SRAM or peripheral decode PLDs. Operate VCC at 3.3 V for modern MPUs; inputs are 5.5 V tolerant for legacy 5 V host compatibility. The shared select input lets a single address line steer all four channels, saving GPIO count while preserving pin-to-pin compatibility with the older 74HC157 footprint for easy upgrades.
Recommended
Test Equipment Signal Steering
In bench-top test equipment and ATE fixtures, the SN74LVC157APWRE4 routes stimulus or measurement signals between two DUT sources under software control. Its +/-24 mA drive and 3.3 V rail-to-rail outputs drive 50-ohm-terminated transmission lines when placed close to the DUT connector. Industrial -40 C to +85 C grading suits factory-floor environmental chambers, and the TSSOP-16 hand-solder-friendly lead pitch (0.65 mm) accommodates rework. The active-LOW strobe provides a clean default state during power-up sequencing, avoiding momentary bus contention.
Recommended
Industrial Bus Sharing and Resource Multiplexing
The SN74LVC157APWRE4's industrial temperature grade and 1.65 V-3.6 V operation make it well suited to factory automation where multiple sensors or actuators must share a single ADC channel or communication line. Use the active-LOW strobe to default the mux to a known source during firmware boot, then drive the shared select line from an isolated digital output. Inputs tolerate up to 5.5 V, allowing direct interfacing with industrial 5 V sensor bridges without level shifters. TSSOP-16 footprint integrates into dense PLC backplanes where board real estate is limited.
Recommended
Audio Signal Source Selection
For consumer and prosumer audio, the SN74LVC157APWRE4 selects between two digital audio sources (e.g., S/PDIF or I2S lines) feeding a DAC. Operating at 3.3 V with rail-to-rail CMOS outputs, the device introduces no analog artifacts and contributes only sub-nanosecond jitter via its symmetrical propagation delay. Inputs are 5.5 V tolerant, accommodating legacy 5 V audio source chips. Place the mux within 25 mm of the DAC to minimize trace capacitance, and pair with local 0.1 uF + 10 uF decoupling to keep VCC ripple below 50 mVpp during channel switching.
Recommended
Communication Protocol Fan-Out and Bridging
The SN74LVC157APWRE4 lets a single UART, SPI, or I2C controller drive two downstream buses (for example, an internal module plus an external expansion connector). Its 1.65 V-3.6 V operation matches modern 1.8 V or 3.3 V MCUs, while the shared select pin enables synchronized switching across all four muxed channels with no skew. The TSSOP-16 footprint is small enough to fit inside a Type-C connector shield on USB-PD adapter boards. Designers should place a 33 ohm series resistor at each mux output to dampen reflections when driving long cables.
Recommended
Recommended Products Summary
Engineering reference data for SN74LVC157APWRE4 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | SN74LVC157APWR | SN74LVC157APWREP | 74LVC157APW,118 | MC74LCX157 | 74LVC157APW-Q100 |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Nexperia | onsemi | Nexperia |
| Package | TSSOP-16 (PW) | TSSOP-16 (PW) - same | TSSOP-16 (PW) - same | TSSOP-16 (PW) - same | TSSOP-16 (PW) - same | TSSOP-16 (PW) - same |
| Supply Voltage (VCC) | 1.65 V to 3.6 V | 1.65 V to 3.6 V | 1.65 V to 3.6 V | 1.65 V to 3.6 V | 2.0 V to 3.6 V (narrower) | 1.65 V to 3.6 V |
| Input Voltage Tolerance | 5.5 V tolerant | 5.5 V tolerant | 5.5 V tolerant | 5.5 V tolerant | 5.5 V tolerant | 5.5 V tolerant |
| Output Drive (IOH/IOL) | +/-24 mA @ 3.3 V | +/-24 mA @ 3.3 V | +/-24 mA @ 3.3 V | +/-24 mA @ 3.3 V | +/-24 mA @ 3.3 V | +/-24 mA @ 3.3 V |
| Output Type | True (non-inverted), push-pull | True, push-pull | True, push-pull | True, push-pull | True, push-pull | True, push-pull |
| Operating Temperature | -40 C to +85 C (industrial) | -40 C to +85 C | -40 C to +125 C (automotive Q1) | -40 C to +125 C | -40 C to +85 C | -40 C to +125 C (automotive) |
| AEC-Q100 Qualified | No (industrial grade) | No | Yes | No (standard grade) | No | Yes |
| Approx. Unit Price @ 1k | $0.26 | $0.25 | $0.55 | $0.22 | $0.30 | $0.45 |
Key Differentiators
- Cross-brand drop-in availability in TSSOP-16 (vs 74LVC157APW,118 (Nexperia))
- Industrial temperature grade standard; automotive variant available (vs SN74LVC157APWREP (TI Q1))
- 5.5 V tolerant inputs on a low-VCC core (vs MC74LCX157 (onsemi LCX))
Design Notes
Place a 0.1 uF ceramic decoupling capacitor within 5 mm of the VCC pin (pin 16) and a 10 uF bulk capacitor on the same supply rail. The SN74LVC157APWRE4 draws transient current during simultaneous-output switching, so VCC bounce above 50 mV can introduce logic-level glitches. Estimated: with four channels toggling simultaneously at 10 MHz into 50 pF loads, dynamic ICC peaks around 8-10 mA. A small ferrite bead in series with VCC can further suppress switching noise on shared rails.
Keep the TSSOP-16 device close to the driving source to minimize capacitive loading on the mux outputs. Avoid routing mux outputs parallel to clock or high-speed signal traces for more than 25 mm to prevent crosstalk. Place a ground guard trace between adjacent channels when running four outputs in parallel at high frequency. The exposed thermal pad is not present on TSSOP-16 - only the eight ground leads share return current, so a solid ground pour under the package is recommended.
Do not leave the strobe input (pin 15, E-bar) floating: an undriven strobe will float near the threshold and cause intermittent channel disabling. Tie E-bar to GND through a 10 kohm pulldown if no MCU control is available. Do not drive inputs above 5.5 V even briefly - although the LVC family is 5 V tolerant, transient over-voltage can trigger ESD clamping and degrade long-term reliability. Always confirm VCC is within 1.65 V-3.6 V before applying input signals; partial-power-down (Ioff) protects outputs only when VCC = 0 V.
For outputs driving cables or long traces (greater than 50 mm), add a 22-33 ohm series damping resistor within 10 mm of the mux output pin to suppress transmission-line reflections. The +/-24 mA drive strength combined with low output impedance (~25 ohm at 3.3 V) makes under-damped ringing possible on unterminated lines. For very-high-speed muxing (above 50 MHz), consider the SN74LVC157A's typical propagation delay budget of 4-5 ns and ensure downstream devices have adequate setup/hold margin.
Compliance Information
RoHS-compliant per TI product page. Lead-free Pb-free finish. Standard grade is not AEC-Q100; use SN74LVC157APWREP for automotive qualification. Halogen-free per TI's Green/RoHS material declaration.