TJA1104AHN-0J - MACsec ASIL B 100BASE-T1 PHY | NXP
MPN: TJA1104AHN-0J ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.2 | $6.20 |
| 10 | $5.58 | $55.80 |
| 100 | $4.96 | $496.00 |
| 500 | $4.46 | $2,230.00 |
| 1,000 | $4.02 | $4,020.00 |
TJA1104AHN-0J Overview
An Ethernet PHY (physical layer transceiver) is the interface device that converts digital MAC frames into analog signals suitable for transmission over a physical medium. In the automotive Ethernet hierarchy, the PHY sits between the media access controller (MAC) inside a processor or switch and the single unshielded twisted-pair link defined by the 100BASE-T1 standard (formerly known as BroadR-Reach), enabling in-vehicle networks to carry 100 Mbit/s data over a single pair with weight and cost savings compared with legacy 100BASE-TX.
Key features include IEEE 100BASE-T1 compliant single-pair operation, hardware-based MACsec (IEEE 802.1AE) link security for protection against spoofing and man-in-the-middle attacks, and functional-safety design according to ISO 26262 to meet ASIL B with enhanced monitoring and diagnostic features. The device also integrates OPEN Alliance TC10-compliant wake-up forwarding over the Ethernet data line, enabling seamless sleep/wake coordination in automotive domain and zonal architectures.
According to NXP, TJA1104 is the first MACsec-enabled product in NXP's family of 100BASE-T1 automotive Ethernet PHYs, addressing security concerns for future vehicle networks with an efficient hardware-based solution. The device complies with all state-of-the-art conformance test specifications and supports scalable platform designs: TJA1104 is drop-in compatible with TJA1103 and TJA1120, allowing designers to migrate to secured links without PCB redesign. The part is AEC-Q100 qualified for automotive environments and RoHS compliant.
Typical applications include automotive domain controllers and zonal gateways requiring MACsec-secured links, ADAS sensor aggregation over in-vehicle networks, and infotainment backbones where data integrity and functional safety are critical.
When designing with this device, verify MAC interface selection (MII/RMII/RGMII) early since it affects processor compatibility and reference clock architecture, and plan for TC10 wake/sleep signaling per the OPEN Alliance specification.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for TJA1104AHN-0J — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
TJA1103AHN
✅ Drop-In📋 Reference alternative (not in catalog)
TJA1120
✅ Drop-In📋 Reference alternative (not in catalog)
TJA1104AHN-0J Specifications
| Product Type | Automotive Ethernet 100BASE-T1 PHY Transceiver |
| Data Rate | 100 Mbit/s |
| MAC Interfaces | MII / RMII / RGMII |
| Security | MACsec (IEEE 802.1AE) hardware link encryption |
| Functional Safety | ISO 26262, ASIL B compliant |
| Wake-Up | OPEN Alliance TC10 compliant wake-up forwarding over Ethernet data line |
| Standard Compliance | 100BASE-T1 conformance test specifications |
| Drop-in Compatibility | Compatible with TJA1103 and TJA1120 |
| Qualification | AEC-Q100 automotive qualified |
| Package | 36-pin HVQFN with exposed pad |
| Mounting Type | Surface Mount |
| Application Domain | Automotive (ASIL B capable systems) |
| RoHS Status | Compliant |
| Packaging | Tape and Reel |
| Number of Channels | 1 |
TJA1104AHN-0J 36-pin hvqfn with exposed pad Pin Configuration Guide
Pin configuration for TJA1104AHN-0J (36-pin hvqfn with exposed pad package). Pin numbering, functions, and connection diagrams are defined in the manufacturer datasheet. Refer to it for the exact footprint and soldering guidelines.
No detailed pinout data available for TJA1104AHN-0J.
Refer to the datasheet for full pin configuration.
Typical Applications
TJA1104AHN-0J is suitable for 6 applications: Automotive Domain and Zonal Gateways, ADAS Sensor Aggregation Links, In-Vehicle Infotainment Backbones, OTA Update and Security Gateways, Body and Comfort Network Segmentation, Industrial Machine Ethernet with Functional Safety.
Automotive Domain and Zonal Gateways
The TJA1104AHN-0J fits domain and zonal controller uplinks where a single 100BASE-T1 link aggregates zonal traffic and security matters: its hardware MACsec encrypts every frame on the link at wire rate, protecting against injected frames and man-in-the-middle attacks without loading the host CPU. Placed between the gateway SoC RGMII port and the single twisted-pair harness, it also forwards TC10 wake/sleep signaling over the same data line, so no dedicated wake wire is needed. The ASIL B design and diagnostics support safety-relevant gateway functions.
Recommended
ADAS Sensor Aggregation Links
Camera, radar, and lidar front-ends stream data over 100BASE-T1 single-pair links into central ADAS controllers, and the TJA1104AHN-0J secures those links at the PHY level with MACsec while meeting the ASIL B design expectations common to ADAS systems. Its TC10-compliant wake-up forwarding lets sensors enter low-power sleep and be woken over the Ethernet data line, eliminating harness weight. The AEC-Q100 qualification and conformance-tested 100BASE-T1 operation ensure reliable links across automotive temperature and EMC conditions.
Recommended
In-Vehicle Infotainment Backbones
Infotainment head units, displays, and audio amplifiers connect over automotive Ethernet, and the TJA1104AHN-0J adds MACsec protection to content and control streams against tampering while preserving 100 Mbit/s throughput on a single unshielded twisted pair. Its MII/RMII/RGMII flexibility lets it attach to SoC media interfaces or Ethernet switches, and TC10 wake-up forwarding coordinates sleep states across the IVI network. Drop-in compatibility with TJA1103 lets cost-optimized variants reuse the same PCB where security is not required.
Recommended
OTA Update and Security Gateways
Over-the-air update paths are prime attack targets, so securing the ingress link is critical. The TJA1104AHN-0J terminates the external Ethernet link with hardware MACsec (IEEE 802.1AE), authenticating and encrypting update frames before they reach the vehicle's internal network, which drastically reduces the attack surface exposed to wired access ports. Hardware encryption also sustains full 100 Mbit/s update throughput without software crypto overhead, shortening update windows, while ASIL B monitoring reports link integrity to the safety supervisor.
Recommended
Body and Comfort Network Segmentation
Modern body electronics distribute door, lighting, and climate nodes off Ethernet backbones; the TJA1104AHN-0J links these zonal nodes at 100 Mbit/s over a single twisted pair while TC10 wake-up forwarding wakes sleeping nodes directly over the data line, cutting dedicated wake wiring. Its monitoring and diagnostic features aligned with ISO 26262 ASIL B design support fault reporting for safety-related body functions, and the HVQFN-36 footprint shared with TJA1103 allows a common PCB across secured and non-secured nodes for platform scalability.
Recommended
Industrial Machine Ethernet with Functional Safety
Although designed for automotive, the TJA1104AHN-0J serves industrial single-pair Ethernet links where link security and functional-safety monitoring are required, such as safety-rated robotic cells and motion-control backbones using 100BASE-T1-class physical layers. Hardware MACsec prevents unauthorized frame injection into the machine network, and the ASIL B-derived diagnostics give PLC safety controllers visibility into link health. Its -40C automotive qualification range suits harsh factory-floor environments and the RGMII interface attaches directly to industrial Ethernet switches.
Recommended
Recommended Products Summary
Engineering reference data for TJA1104AHN-0J — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | TJA1103AHN | TJA1120 |
|---|---|---|---|
| Package | HVQFN-36 (exposed pad) | HVQFN-36 (exposed pad) - same | HVQFN-36 (exposed pad) - same |
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Qualification | AEC-Q100 | AEC-Q100 | AEC-Q100 |
Key Differentiators
- Hardware MACsec link security (vs TJA1103AHN)
- ASIL B functional-safety design (vs TJA1103AHN)
- Zero-redesign migration path (vs TJA1120)
Design Notes
The HVQFN-36 exposed pad is the primary ground and thermal path. Connect the exposed pad to a solid ground plane with an array of thermal vias (typically 3x3 or more per NXP layout recommendations). Because TJA1104, TJA1103, and TJA1120 share the footprint per NXP, lay out the land pattern once and verify it against all datasheets to preserve drop-in flexibility across secured and non-secured variants.
The 100BASE-T1 single twisted-pair interface requires a proper magnetics/transformer network (or NXP-recommended discrete PoE-style coupling) matching the datasheet application diagram. Keep the MDI pair differential and length-matched, route away from switching regulator nodes, and follow the conformance-test reference design from NXP to pass EMC requirements for automotive 100 Mbit/s links.
Confirm the MAC interface mode (MII, RMII, or RGMII) pin strapping and reference-clock architecture early: RMII/RGMII clocking differs between host SoCs and is a frequent source of non-working links. Also verify TC10 wake/sleep configuration, since wake-up forwarding over the data line must be enabled consistently at both ends of the link (per OPEN Alliance TC10) or nodes will not enter or exit sleep as intended.
Compliance Information
RoHS compliant and AEC-Q100 qualified per Arrow/Newark listings and NXP product page. ISO 26262 design to ASIL B per NXP. REACH/halogen-free details require NXP material declaration documents.
