2ED2304S06FXUMA1 vs 2ED21064S06JXUMA1 Comparação
Comparação detalhada lado a lado de 2ED2304S06FXUMA1 por Infineon e 2ED21064S06JXUMA1 por Infineon. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | 2ED2304S06FXUMA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoria | Power MOSFET Drivers | Power MOSFET Drivers |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,66 | $0,85 |
| Driver Configuration | Half-Bridge (High-Side + Low-Side) | — |
| Technology | Infineon thin-film SOI | — |
| Blocking Voltage (High-Side) | 650 V | — |
| Source Current (typ.) | 0.36 A | — |
| Sink Current (typ.) | 0.7 A | — |
| Input Logic Compatibility | 3.3 V CMOS / LSTTL (Schmitt-trigger) | 3.3 V / 5 V CMOS |
| VCC Supply Range | 10 V to 17 V | — |
| Bootstrap Diode | Integrated (BSD) | Integrated |
| Undervoltage Lockout (UVLO) | Yes (VCC and VB-VS) | — |
| Interlock / Anti-Shoot-Through | Built-in | — |
| Propagation Delay (typ.) | 200 ns | — |
| Faixa de temperatura de operação | -40C to +125C | — |
| Encapsulamento | PG-DSO-8-910 (DSO-8) | PG-DSO-14 (14-pin SOIC) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Nível MSL | 2 | [DATA_NEEDED: MSL level] |
| Status RoHS | Compliant | ROHS3 Compliant |
| Função | — | High-Side and Low-Side Gate Driver |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| Topologia | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Supply Voltage (VCC) | — | 10 V to 20 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Propagation Delay (typical) | — | 100 ns |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Temperatura de operação | — | -40C to +125C |
| Negative Gate Drive Robustness | — | -0.7 V |