AFS600-1FG256K vs AFS600-FG256 Comparação
Comparação detalhada lado a lado de AFS600-1FG256K por Microchip Technology e AFS600-FG256 por Microchip Technology. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Microchip Technology
AFS600-1FG256K - 600K Fusion Mixed-Signal FPGA | Microchip
AFS600-1FG256K ✓ AtivoComparação de especificações
| Parâmetro | AFS600-1FG256K | AFS600-FG256 |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Device Type | Fusion mixed-signal field-programmable gate array (FPGA) | FPGA |
| Programmable Logic | Flash-based programmable logic | — |
| Equivalent System Gates | 600,000 gates | — |
| Logic Cells | 13,824 logic cells | — |
| User I/O | 119 I/O | — |
| Maximum Frequency | 1282.05 MHz | 1098.9 MHz |
| Core Supply Voltage | 1.5 V | — |
| Integrated Analog | Configurable analog resources | — |
| Embedded Memory | Large flash memory blocks | 110,592 bits |
| Clock Management | Comprehensive clock generation and management circuitry | — |
| Encapsulamento | 256-terminal plastic ball grid array (256-LBGA) | — |
| Terminal Count | 256 terminals | — |
| Package Shape | Square | — |
| Terminal Pitch | 1.00 mm | — |
| Package Dimensions | 17 mm x 17 mm | — |
| Tipo de montagem | Surface mount | — |
| Ordering Package Option | Tray | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| Faixa de temperatura de operação | [DATA_NEEDED: operating temperature range] | — |
| Product Type | — | Fusion mixed-signal FPGA |
| System Gates | — | 600,000 gates |
| User I/O Count | — | 119 I/Os |
| Tensão de alimentação | — | 1.5 V |
| Logic Family | — | CMOS |
| Process Technology | — | 130 nm |
| Metal Layers | — | 7 layers |
| Configuration Memory | — | Nonvolatile flash-based CMOS |
| Power-Up Behavior | — | Live at Power-Up (LAPU) |
| Package Type | — | 256-pin low-profile BGA |
| Package Pitch | — | 1.0 mm |
| Contagem de pinos | — | 256 pins |
| Temperatura de operação | — | 0 C to 70 C |
| Analog Capability | — | Configurable analog blocks |
| Clock Capability | — | Integrated clock generation and management circuitry |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification status] |