EP1810JC-35 vs EP1810GC-35 Comparação
Comparação detalhada lado a lado de EP1810JC-35 por Intel e EP1810GC-35 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP1810JC-35 | EP1810GC-35 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $5,48 | $177,12 |
| Device Family | Classic EPLD (EP1810) | — |
| Device Type | UV-Erasable Complex PLD (UV PLD / CPLD) | EPLD (Erasable Programmable Logic Device) |
| Number of Macrocells | 48 | — |
| Propagation Delay (tpd) | 35 ns (max) | — |
| Frequência máxima de clock | [DATA_NEEDED: fmax for this speed grade] | — |
| Process Technology | CMOS | — |
| Supply Voltage (Vcc) | 5 V (nominal) | — |
| Maximum Supply Voltage | 5.25 V (per distributor listing) | — |
| Package Type | CQCC-68 (Ceramic J-Lead Chip Carrier, QCCJ) | — |
| Number of Terminals | 68 | — |
| Terminal Form | J-Bend | — |
| Faixa de temperatura de operação | 0°C to 70°C (Commercial) | — |
| Temperature Grade | Commercial | — |
| Erasure Method | UV (quartz-windowed ceramic package) | — |
| Status RoHS | Compliant (per Altera listing) | Not applicable (legacy ceramic package) |
| Lead-Free Status | Lead-free (per distributor listing) | Not applicable |
| Tipo de montagem | Surface Mount (J-Lead) | Through Hole |
| Logic Architecture | Programmable AND/OR array with macrocell outputs | — |
| Logic Family | — | Altera Classic EPLD |
| Technology | — | CMOS, UV-erasable EPROM cells |
| Encapsulamento | — | CPGA-68 (Ceramic Pin Grid Array, 68-pin) |
| Número de pinos | — | 68 |
| Propagation Delay (tpd max) | — | 40 ns |
| Maximum Inputs | — | 64 |
| Maximum Outputs | — | 48 |
| Macrocells | — | 16 |
| I/O Standard | — | TTL-compatible |
| Programming Method | — | UV erasure + EPROM programming |
| Temperatura de operação | — | [DATA_NEEDED: operating temperature range] |
| Tensão de alimentação | — | [DATA_NEEDED: VCC range] |
| Manufacturer (current source) | — | Rochester Electronics (authorized Altera EPLD partner) |
| Original Manufacturer | — | Altera Corporation (now Intel FPGA) |