EP20K200EQC208-3N vs EP20K200EQC208-3 Comparação
Comparação detalhada lado a lado de EP20K200EQC208-3N por Intel e EP20K200EQC208-3 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP20K200EQC208-3N | EP20K200EQC208-3 |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,00 | $65,00 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | APEX 20K | — |
| Logic Family | CMOS | — |
| Gate Capacity | 200K gates | — |
| Logic Cells | 8,320 cells | — |
| Macro Count | 832 macros | — |
| User I/O Count | 136 I/Os | — |
| Maximum Operating Frequency | 189 MHz | — |
| Propagation Delay | 2.5 ns | — |
| Tensão de alimentação | 1.8 V | — |
| Alternate Supply Listing | 2.5 V | — |
| Encapsulamento | 208-pin PQFP | 208-BFQFP / PQFP208 (Plastic Quad Flat Pack, gull-wing) |
| Alternate Package Listing | 356-ball BGA | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Temperatura de operação | 0 C to 85 C | — |
| Configuration | MultiCore programmable architecture | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | APEX 20KE |
| Series | — | APEX 20K (enhanced "E" variant) |
| Product Type | — | FPGA (Field Programmable Gate Array), SRAM-based, in-system programmable |
| System Gates (typical) | — | 200,000 |
| Logic Elements (LEs) | — | 8,320 |
| Embedded RAM Bits | — | 106,496 |
| Maximum User I/O | — | 136 |
| Speed Grade | — | -3 |
| Core Supply Voltage (VCCINT) | — | 2.5 V (typical, APEX 20KE generation) |
| I/O Supply Voltage (VCCIO) | — | MultiVolt, 1.8 V / 2.5 V / 3.3 V / 5 V compatible |
| Terminal Pitch | — | 0.5 mm |
| Technology | — | CMOS, SRAM configuration cell |
| Configuration Mode | — | Fast Passive Parallel (FPP), Passive Serial (PS), JTAG (IEEE 1149.1) |
| Embedded Array Blocks (EABs) | — | Yes (dual-port RAM/ROM, up to 16-bit wide) |
| MultiVolt I/O Support | — | Yes |
| LVDS Support | — | True-LVDS (enhanced "E" variant feature) |
| Nível de sensibilidade à umidade (MSL) | — | 3 (168 Hours) |
| Operating Temperature (Commercial) | — | 0 °C to 85 °C |