EP3SL50F484I4L vs EP3SL50F484I4LG Comparação
Comparação detalhada lado a lado de EP3SL50F484I4L por Intel e EP3SL50F484I4LG por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EP3SL50F484I4LG - Stratix III L FPGA, 47.5K LE, 484-FCBGA | Altera (Intel)
EP3SL50F484I4LG NrndComparação de especificações
| Parâmetro | EP3SL50F484I4L | EP3SL50F484I4LG |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $658,26 | $945,00 |
| Series | Stratix III L (Low Power) | EP3SL50 |
| Family | Stratix III | Stratix III L |
| Logic Elements (LE) | 47,500 | — |
| Embedded Memory Bits | 2,184,192 bits (~273 KB) | — |
| User I/O Pins | 296 | — |
| Encapsulamento | 484-ball FBGA (FCBGA) | 484-Ball FCBGA (FBGA) |
| Speed Grade | 4 | I4 (fast) |
| Temperatura de operação | 0 °C to 85 °C (commercial, per DigiKey listing) | -40C to +100C (Industrial) |
| Tensão de alimentação | 0.9 V core (family-typical) | 0.85 V / 1.1 V / 1.2 V / 2.5 V / 3.3 V (multi-rail) |
| Process Technology | 65 nm low-power CMOS | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Yes (RoHS compliant) | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| Transceivers | Family supports up to 4 transceivers per family datasheet | [DATA_NEEDED: transceiver channel count] |
| DSP Blocks | Family supports up to 384 18x18 multipliers (family-level) | [DATA_NEEDED: DSP block count] |
| Logic Elements | — | 47,500 |
| Embedded Memory | — | 2,184,192 bits (273 KB) |
| User I/Os | — | 296 |
| Process Node | — | 40 nm |
| Status RoHS | — | Compliant |
| Lead-Free | — | Yes |
| Total I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Configuration Memory | — | SRAM-based |
| Configuration Interface | — | JTAG / Passive Serial / Fast Passive Parallel |