EP610LI-25 vs EP610DC-20 Comparação
Comparação detalhada lado a lado de EP610LI-25 por Rochester Electronics e EP610DC-20 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Rochester Electronics
EP610LI-25 - 16-Macrocell Classic EPLD, 25ns, CMOS | Altera / Rochester Electronics
EP610LI-25 ✓ AtivoComparação de especificações
| Parâmetro | EP610LI-25 | EP610DC-20 |
|---|---|---|
| Marca | Rochester Electronics | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $17,25 | $15,85 |
| Product Type | EPLD (Erasable Programmable Logic Device) | CMOS UV-Erasable Programmable Logic Device (EPLD) |
| Family | Altera Classic EP610 | Classic EP610 |
| Macrocells | 16 | — |
| Usable Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate (fMAX) | 100 MHz | — |
| Speed Grade | 25 (25 ns tPD) | — |
| Power Variant | L (low-power CMOS) | — |
| Temperature Grade | I (industrial) | — |
| Dedicated Inputs | 4 | 4 |
| I/O Pins | 16 | 16 (bidirectional) |
| Technology | CMOS, UV-erasable (windowed) | — |
| Encapsulamento | Ceramic DIP-24 (windowed, Altera 'I' designation) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Tipo de montagem | Through-hole | Through-hole |
| Programming Method | Altera MAX+PLUS II / Classic compiler + compatible programmer | UV erasure + parallel programmer |
| Status RoHS | Unknown - ceramic DIP legacy package | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer / Source | Altera (original), Rochester Electronics (authorized continuing supplier) | — |
| Logic Macrocells | — | 16 |
| Total Usable Pins | — | 20 |
| Product Terms (p-terms) | — | 160 |
| Propagation Delay (tPD) | — | 22 ns |
| Maximum Toggle Frequency (fMAX) | — | 55.6 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Temperatura de operação | — | 0 °C to 70 °C (commercial) |
| Process Technology | — | CMOS, UV-erasable floating gate |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |