EP610LI-25 vs EP610DC-20 비교
다음의 상세 나란히 비교: EP610LI-25 제조: Rochester Electronics 및 EP610DC-20 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Rochester Electronics
EP610LI-25 - 16-Macrocell Classic EPLD, 25ns, CMOS | Altera / Rochester Electronics
EP610LI-25 ✓ 활성사양 비교
| 파라미터 | EP610LI-25 | EP610DC-20 |
|---|---|---|
| 브랜드 | Rochester Electronics | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $17.25 | $15.85 |
| Product Type | EPLD (Erasable Programmable Logic Device) | CMOS UV-Erasable Programmable Logic Device (EPLD) |
| Family | Altera Classic EP610 | Classic EP610 |
| Macrocells | 16 | — |
| Usable Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate (fMAX) | 100 MHz | — |
| Speed Grade | 25 (25 ns tPD) | — |
| Power Variant | L (low-power CMOS) | — |
| Temperature Grade | I (industrial) | — |
| Dedicated Inputs | 4 | 4 |
| I/O Pins | 16 | 16 (bidirectional) |
| Technology | CMOS, UV-erasable (windowed) | — |
| 패키지 | Ceramic DIP-24 (windowed, Altera 'I' designation) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| 실장 유형 | Through-hole | Through-hole |
| Programming Method | Altera MAX+PLUS II / Classic compiler + compatible programmer | UV erasure + parallel programmer |
| RoHS 상태 | Unknown - ceramic DIP legacy package | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer / Source | Altera (original), Rochester Electronics (authorized continuing supplier) | — |
| Logic Macrocells | — | 16 |
| Total Usable Pins | — | 20 |
| Product Terms (p-terms) | — | 160 |
| Propagation Delay (tPD) | — | 22 ns |
| Maximum Toggle Frequency (fMAX) | — | 55.6 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| 동작 온도 | — | 0 °C to 70 °C (commercial) |
| Process Technology | — | CMOS, UV-erasable floating gate |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |