EP610LI-25 vs EP610DC-20 对比
详细并排对比 EP610LI-25 出自 Rochester Electronics 和 EP610DC-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Rochester Electronics
EP610LI-25 - 16-Macrocell Classic EPLD, 25ns, CMOS | Altera / Rochester Electronics
EP610LI-25 ✓ 量产中规格对比
| 参数 | EP610LI-25 | EP610DC-20 |
|---|---|---|
| 品牌 | Rochester Electronics | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $17.25 | $15.85 |
| Product Type | EPLD (Erasable Programmable Logic Device) | CMOS UV-Erasable Programmable Logic Device (EPLD) |
| Family | Altera Classic EP610 | Classic EP610 |
| Macrocells | 16 | — |
| Usable Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate (fMAX) | 100 MHz | — |
| Speed Grade | 25 (25 ns tPD) | — |
| Power Variant | L (low-power CMOS) | — |
| Temperature Grade | I (industrial) | — |
| Dedicated Inputs | 4 | 4 |
| I/O Pins | 16 | 16 (bidirectional) |
| Technology | CMOS, UV-erasable (windowed) | — |
| 封装 | Ceramic DIP-24 (windowed, Altera 'I' designation) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| 安装类型 | Through-hole | Through-hole |
| Programming Method | Altera MAX+PLUS II / Classic compiler + compatible programmer | UV erasure + parallel programmer |
| RoHS 状态 | Unknown - ceramic DIP legacy package | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer / Source | Altera (original), Rochester Electronics (authorized continuing supplier) | — |
| Logic Macrocells | — | 16 |
| Total Usable Pins | — | 20 |
| Product Terms (p-terms) | — | 160 |
| Propagation Delay (tPD) | — | 22 ns |
| Maximum Toggle Frequency (fMAX) | — | 55.6 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| 工作温度 | — | 0 °C to 70 °C (commercial) |
| Process Technology | — | CMOS, UV-erasable floating gate |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |