EPC22LC20 vs EPC2CC20N Comparação
Comparação detalhada lado a lado de EPC22LC20 por Intel e EPC2CC20N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPC22LC20 | EPC2CC20N |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $4,10 | $10,85 |
| Função | In-System Programmable Configuration PROM for SRAM-based FPGAs | Configuration device for SRAM-based LUT FPGAs |
| Tamanho da memória | 1.6 Mbit | — |
| Programmable Type | In System Programmable (IEEE 1532 / Jam STAPL) | — |
| Supply Voltage - Low Range | 3.0 V to 3.6 V | — |
| Supply Voltage - High Range | 4.75 V to 5.25 V | — |
| Supported FPGA Families | ACEX 1K, APEX II, APEX 20K, FLEX 10K | — |
| Configuration Interface | Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE) | 16-bit parallel (FPP) / Passive Serial (PS) |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster |
| Encapsulamento / Caixa | 20-LCC (J-Lead, 9 x 9 mm) | — |
| Tipo de montagem | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC-20 socket compatible) |
| Packaging | Tube | — |
| Temperatura de operação | 0 C to +70 C (commercial) | [DATA_NEEDED: industrial/commercial temp range] |
| Minimum DC Input Voltage | -0.3 V | — |
| Input Overshoot Tolerance | 7.0 V for <100 mA, <20 ns no-load | — |
| Input Undershoot Tolerance | -2.0 V for <100 mA, <20 ns no-load | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free status not in verified data] | — |
| Density | — | [DATA_NEEDED: bitstream density in bits] |
| Encapsulamento | — | PLCC-20 |
| Supply Voltage (VCC) | — | 3.3 V |
| In-System Programmable | — | Yes |
| Error Detection | — | 16-bit CRC on configuration frames |
| Configuration Modes Supported | — | FPP and PS (depends on host FPGA) |
| Cascadable | — | Yes (multiple EPC2 devices for larger bitstreams) |
| Open-Drain Status Pin | — | Yes (CONF_DONE / nSTATUS compatible) |
| Nível MSL | — | [DATA_NEEDED: MSL rating] |
| Status RoHS | — | [DATA_NEEDED: RoHS compliance status] |