EPC22LC20 vs EPC2CC20N 比較
詳細並排比較 EPC22LC20 由 Intel 與 EPC2CC20N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC22LC20 | EPC2CC20N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| 功能 | In-System Programmable Configuration PROM for SRAM-based FPGAs | Configuration device for SRAM-based LUT FPGAs |
| 記憶體容量 | 1.6 Mbit | — |
| Programmable Type | In System Programmable (IEEE 1532 / Jam STAPL) | — |
| Supply Voltage - Low Range | 3.0 V to 3.6 V | — |
| Supply Voltage - High Range | 4.75 V to 5.25 V | — |
| Supported FPGA Families | ACEX 1K, APEX II, APEX 20K, FLEX 10K | — |
| Configuration Interface | Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE) | 16-bit parallel (FPP) / Passive Serial (PS) |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster |
| 封裝 / 外殼 | 20-LCC (J-Lead, 9 x 9 mm) | — |
| 安裝類型 | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC-20 socket compatible) |
| Packaging | Tube | — |
| 工作溫度 | 0 C to +70 C (commercial) | [DATA_NEEDED: industrial/commercial temp range] |
| Minimum DC Input Voltage | -0.3 V | — |
| Input Overshoot Tolerance | 7.0 V for <100 mA, <20 ns no-load | — |
| Input Undershoot Tolerance | -2.0 V for <100 mA, <20 ns no-load | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free status not in verified data] | — |
| Density | — | [DATA_NEEDED: bitstream density in bits] |
| 封裝 | — | PLCC-20 |
| Supply Voltage (VCC) | — | 3.3 V |
| In-System Programmable | — | Yes |
| Error Detection | — | 16-bit CRC on configuration frames |
| Configuration Modes Supported | — | FPP and PS (depends on host FPGA) |
| Cascadable | — | Yes (multiple EPC2 devices for larger bitstreams) |
| Open-Drain Status Pin | — | Yes (CONF_DONE / nSTATUS compatible) |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS compliance status] |