EPM3256AQC208-10N vs EPM3256AQC208-10 Comparação
Comparação detalhada lado a lado de EPM3256AQC208-10N por Altera e EPM3256AQC208-10 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM3256AQC208-10 - MAX 3000A CPLD 256 Macrocells 10ns 208-PQFP | Intel / Altera
EPM3256AQC208-10 ObsoleteComparação de especificações
| Parâmetro | EPM3256AQC208-10N | EPM3256AQC208-10 |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $4,62 | $15,20 |
| Series | MAX 3000A | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Number of Macrocells | 256 | — |
| Number of Logic Elements/Blocks | 16 LABs | — |
| Usable Gates | 10,000 | 5,000 |
| Number of I/O Pins | 161 (158 user I/O per Arrow listing) | — |
| Propagation Delay (tpd) | 10 ns (max) | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Supply Voltage - Internal | 3.0 V to 3.6 V (3.3 V typical) | — |
| Temperatura de operação | 0C to +70C (Commercial) | 0 °C to +70 °C (Commercial) |
| Encapsulamento / Caixa | 208-BFQFP / 208-PQFP (28x28 mm) | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| ISP Compliance | IEEE Std. 1532 | — |
| Boundary Scan | IEEE Std. 1149.1 (JTAG) | — |
| I/O Tolerance | 5 V tolerant, MultiVolt interface | MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant |
| Status RoHS | [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 3000A |
| Logic Family | — | CMOS (EEPROM-based) |
| Macrocells | — | 256 |
| User I/Os | — | 161 |
| Número de pinos | — | 208 |
| Encapsulamento | — | 208-BFQFP (PQFP, Gull Wing) |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Counter Frequency (max) | — | 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Programming Interface | — | IEEE 1149.1 JTAG (ISP) |
| PCI-SIG Compliance | — | Yes (speed grades -4, -5, -6, -7, -10) |
| Global Clock Networks | — | 4 (CLK, CLR, OE, GCLK) |