EPM3256ATI144-10 vs EPM3256ATC144-10N Comparação

Comparação detalhada lado a lado de EPM3256ATI144-10 por Intel e EPM3256ATC144-10N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Altera
EPM3256ATC144-10N EPM3256ATC144-10N - 256-Macro CPLD, 10ns, 144-TQFP | Altera

EPM3256ATC144-10N - 256-Macro CPLD, 10ns, 144-TQFP | Altera

EPM3256ATC144-10N ⚠ Última compra

Comparação de especificações

Parâmetro EPM3256ATI144-10 EPM3256ATC144-10N
Marca Intel Altera
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida Obsolete Última compra
Status do estoque In Stock In Stock
Preço unitário (USD) $0,00 $14,50
Series MAX 3000A MAX 3000A
Programmable Type In-System Programmable (ISP), EEPROM-based —
Number of Macrocells 256 —
Number of Logic Elements / Blocks 16 LABs (Logic Array Blocks) 16 LABs
Number of Gates 5,000 typical usable gates —
Number of User I/O 116 —
Propagation Delay (tpd max) 10 ns —
Maximum Frequency (fmax) 95.2 MHz —
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) 3.3 V
I/O Voltage Support MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V mixed —
Logic Family CMOS, EEPROM-based —
Temperatura de operação -40°C to +85°C (industrial) 0C to +70C (commercial) [DATA_NEEDED: exact operating-temp grade letter for -10N suffix]
Encapsulamento 144-pin TQFP (20x20 mm) 144-LQFP (TQFP, ATC suffix)
Tipo de montagem Surface Mount Surface Mount
Programming Interface JTAG (IEEE 1149.1) and IEEE Std. 1532 ISP —
Compliance IEEE Std. 1532 ISP, PCI-compatible I/O —
Status do ciclo de vida Obsolete (per HighqualityPCB listing) —
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 256
Usable Gates — 5,000 (up to 10,000 usable in family)
Number of I/Os — 116
Propagation Delay (tPD) — 10 ns
Maximum Counter Frequency — 227.3 MHz
Global Clocks — 3
Global Clear / OE — Yes (1 global clear, 1 global OE)
Program Memory Type — EEPROM (non-volatile, in-system programmable)
JTAG Support — IEEE Std. 1149.1 with pin-locking
ISP Compliance — IEEE Std. 1532
Boundary-Scan Test (BST) — Built-in, IEEE 1149.1 compliant
Status RoHS — [DATA_NEEDED: RoHS compliance - not explicitly confirmed in verified data]
Lead-Free / Halogen-Free — [DATA_NEEDED: not explicitly confirmed in verified data]

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