EPM51929C vs EPM5192AGC84-20 Comparação
Comparação detalhada lado a lado de EPM51929C por Intel e EPM5192AGC84-20 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM51929C | EPM5192AGC84-20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $9,40 | $41,20 |
| Device Family | MAX 5000 | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Architecture | Multi-array matrix (PAL-based macrocells) | — |
| Logic Density | [DATA_NEEDED: usable gates] | — |
| Number of Macrocells | [DATA_NEEDED: macrocell count] | — |
| Número de pinos | [DATA_NEEDED: pin count] | — |
| Package Type | [DATA_NEEDED: package suffix - C denotes commercial temperature grade] | — |
| Technology | CMOS EPROM | — |
| Programmability | UV-erasable, JEDEC fuse map | — |
| Temperatura de operação | Commercial (0C to +70C) | — |
| Tensão de alimentação | [DATA_NEEDED: VCC range] | [DATA_NEEDED: VCC range] |
| Propagation Delay | [DATA_NEEDED: tpd specification] | — |
| Maximum Toggle Frequency | [DATA_NEEDED: fmax] | — |
| Tipo de montagem | Surface Mount or Through-Hole (package dependent) | Through-Hole (Pin Grid Array socket) |
| Status RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | unknown | — |
| Nível MSL | [DATA_NEEDED] | — |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| Family | — | MAX 5000 |
| Macrocells | — | 192 |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Logic Gates (typical) | — | [DATA_NEEDED: typical gate count] |
| Maximum Clock Frequency (fMAX) | — | 66.7 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Encapsulamento | — | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) |
| Package Code | — | WPGA |
| Erasure Method | — | UV-Erasable (with OTP window) |
| Process Technology | — | CMOS |
| Operating Temperature Grade | — | Commercial |
| I/O Standard | — | 5V CMOS / TTL compatible |