EPM9320GC280-20 vs EPM9320RC208-20 Comparação
Comparação detalhada lado a lado de EPM9320GC280-20 por Altera e EPM9320RC208-20 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM9320GC280-20 | EPM9320RC208-20 |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $67,00 | $21,90 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 320 | 320 |
| Usable Gates | 6000 (approx.) | 6,000 |
| Logic Array Blocks (LABs) | 20 (16 macrocells each, typical for MAX 9000) | 20 |
| Maximum Operating Frequency | 100 MHz (internal counter) | — |
| Propagation Delay (tpd) | 23 ns (approx., -20 speed grade) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | — |
| JTAG Support | IEEE Std. 1149.1 compliant | — |
| Encapsulamento | 280-pin Ceramic Pin Grid Array (CPGA) | 208-RQFP, exposed pad (208-BFQFP) |
| Temperatura de operação | [DATA_NEEDED: operating temperature grade] | 0 °C to 70 °C (commercial) |
| Tipo de montagem | Through-Hole (PGA socket) | Surface Mount |
| Status RoHS | unknown | — |
| Configuration Memory | EEPROM (non-volatile, instant-on) | — |
| Maximum I/O Pins | — | 132 |
| Propagation Delay (tPD max) | — | 20 ns |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Programming Technology | — | EEPROM, in-system programmable (ISP) |
| Boundary-Scan Interface | — | IEEE Std. 1149.1 (JTAG) |
| Architecture | — | Multiple Array Matrix (MAX), 3rd generation |
| Process Technology | — | CMOS, 5.0 V EEPROM |
| Reprogrammability | — | Yes, unlimited ISP cycles |