XC3090L-8PC84BKJ vs XC3090L-8PCG84C Comparação
Comparação detalhada lado a lado de XC3090L-8PC84BKJ por Xilinx e XC3090L-8PCG84C por Xilinx. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | XC3090L-8PC84BKJ | XC3090L-8PCG84C |
|---|---|---|
| Marca | Xilinx | Xilinx |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $19,20 | $26,10 |
| Family | XC3000L Low-Voltage Logic Cell Array | XC3000A/L Series FPGA |
| Logic Cells | 320 | — |
| Usable Gates | 6,000 | — |
| Configuration Memory | 64,160 bits | — |
| Maximum User I/O | 144 | — |
| Supply Voltage (Vcc) | 3.0 V to 3.6 V (low-voltage) | — |
| Speed Grade | -8 (approx. 70 MHz toggle) | -8 (moderate) |
| Process Technology | 5 ns CMOS SRAM | [DATA_NEEDED: process node] |
| Configuration Method | Serial/parallel SRAM, in-system reconfigurable | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Encapsulamento | 84-pin PLCC (J-Lead), windowed ceramic (BKJ) | 84-pin PLCC (J-Lead, PCG84) |
| Temperatura de operação | 0C to +70C (commercial, C suffix) | 0 C to +70 C (commercial 'C' suffix) |
| Tipo de montagem | Through-hole (PLCC socket) | Surface Mount (PLCC J-Lead) |
| Nível MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Status RoHS | unknown - legacy windowed ceramic package | unknown |
| Configuration Pins | M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT | — |
| Logic Cells / CLBs | — | 70 Configurable Logic Blocks |
| Gate Count | — | 6,400 gates (typical) |
| Configuration Program Store | — | 64,160 bits |
| User I/O Pins | — | 70 (maximum) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (low-voltage 'L' variant) |
| Configuration Modes | — | Serial master/slave, parallel master/slave, peripheral mode |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Configuration Clock Range | — | [DATA_NEEDED: CCLK frequency range] |
| Lead-Free | — | unknown |
| Programming Technology | — | SRAM-based, in-system reconfigurable |