XC3090L-8PC84BKJ vs XC3090L-8PCG84C Comparaison
Comparaison détaillée côte à côte de XC3090L-8PC84BKJ par Xilinx et XC3090L-8PCG84C par Xilinx. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | XC3090L-8PC84BKJ | XC3090L-8PCG84C |
|---|---|---|
| Marque | Xilinx | Xilinx |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,20 | $26,10 |
| Family | XC3000L Low-Voltage Logic Cell Array | XC3000A/L Series FPGA |
| Logic Cells | 320 | — |
| Usable Gates | 6,000 | — |
| Configuration Memory | 64,160 bits | — |
| Maximum User I/O | 144 | — |
| Supply Voltage (Vcc) | 3.0 V to 3.6 V (low-voltage) | — |
| Speed Grade | -8 (approx. 70 MHz toggle) | -8 (moderate) |
| Process Technology | 5 ns CMOS SRAM | [DATA_NEEDED: process node] |
| Configuration Method | Serial/parallel SRAM, in-system reconfigurable | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Boîtier | 84-pin PLCC (J-Lead), windowed ceramic (BKJ) | 84-pin PLCC (J-Lead, PCG84) |
| Température de fonctionnement | 0C to +70C (commercial, C suffix) | 0 C to +70 C (commercial 'C' suffix) |
| Type de montage | Through-hole (PLCC socket) | Surface Mount (PLCC J-Lead) |
| Niveau MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Statut RoHS | unknown - legacy windowed ceramic package | unknown |
| Configuration Pins | M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT | — |
| Logic Cells / CLBs | — | 70 Configurable Logic Blocks |
| Gate Count | — | 6,400 gates (typical) |
| Configuration Program Store | — | 64,160 bits |
| User I/O Pins | — | 70 (maximum) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (low-voltage 'L' variant) |
| Configuration Modes | — | Serial master/slave, parallel master/slave, peripheral mode |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Configuration Clock Range | — | [DATA_NEEDED: CCLK frequency range] |
| Lead-Free | — | unknown |
| Programming Technology | — | SRAM-based, in-system reconfigurable |