25LC1024-I/SM - 1Mb SPI Serial EEPROM 8-SOIJ | Microchip
N.º da peça: 25LC1024-I/SM ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $2.65 | $2,65 |
| 10 | $2.39 | $23,90 |
| 100 | $2.1 | $210,00 |
| 500 | $1.85 | $925,00 |
| 1.000 | $1.65 | $1.650,00 |
| 3.000 | $1.48 | $4.440,00 |
25LC1024-I/SM Visão geral
A serial EEPROM is a non-volatile memory device that stores data byte-by-byte over a low-pin-count serial interface rather than a parallel bus. Within the broader semiconductor taxonomy, EEPROM belongs to non-volatile memory (NVM), which also includes Flash, FRAM, and MRAM. SPI EEPROMs occupy a stable position above SRAM/DRAM in the volatile-vs-non-volatile hierarchy and remain widely used for low-density parameter storage where byte-level write granularity, long data retention (200 years typical), and ultra-low standby current are required.
Key features of the 25LC1024-I/SM include software and hardware write protection via the WP pin, a HOLD pin that allows pausing a serial communication without deselecting the device, and the ability to perform chip, sector (64KB), and page erase operations in addition to standard byte and page writes. The 8-SOIJ (Small Outline Isolated J-lead) package offers robust lead-frame compliance for hand-solder and industrial assembly.
The 25LC1024 uses the industry-standard SPI protocol with mode 0 and mode 3 compatibility, four standard instructions (READ, WRITE, WREN, WRDI) plus additional status-register and erase commands. The internal charge pump generates the high voltage required for byte-write operations without external HV supplies. A 32-byte SRAM write buffer and built-in write-status indication simplify firmware development.
Typical applications include industrial control parameter storage, automotive subsystem configuration, consumer-electronics user preferences, medical device calibration data, black-box/event data recorders, and any MCU-based system that needs reliable byte-modifiable non-volatile storage on a minimal pin budget.
When designing with this device, ensure that CS transitions during HOLD remain within the datasheet-specified setup and hold times, and that the WP pin is properly tied (high to protect the upper quadrant or low to allow full writes) according to system security requirements.
This page synthesizes distributor pricing, verified drop-in alternatives in the same 8-SOIJ footprint, and practical design notes not found in the manufacturer datasheet alone, providing a self-contained engineering reference.
Alternativas drop-in para 25LC1024-I/SM — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com 25LC1024-I/SM (mesmo formato e footprint) — diferindo em Endurance, Data Retention, Interface, Memory Size, Memory Type.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
25AA1024T-I/SM
✅ Drop-In✓ Em estoque
$1.92 / unidade
Ver ficha técnica →25LC1024T-I/SM
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
25AA1024-I/SM
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
24LC1025-I/SM
✅ Drop-In✓ Em estoque
$2.1 / unidade
Ver ficha técnica →24LC1025T-I/SM
✅ Drop-In✓ Em estoque
$1.68 / unidade
Ver ficha técnica →25LC1024-I/SM Classificações máximas e características elétricas
| Tipo de memória | EEPROM (Electrically Erasable Programmable Read-Only Memory), Serial, SPI |
| Tamanho da memória | 1 Mbit (128K x 8) |
| Organização da memória | 131,072 bytes (one contiguous block) |
| Interface | SPI (Serial Peripheral Interface), Mode 0 and Mode 3 |
| Supply Voltage (Vcc) | 2.5 V to 5.5 V |
| Maximum SPI Clock Frequency | 20 MHz |
| Page Size | 256 bytes |
| Sector Size (for sector erase) | 64 KB |
| Endurance | >1,000,000 write/erase cycles per page (typical) |
| Data Retention | >200 years (typical) |
| Faixa de temperatura de operação | -40 C to +85 C (Industrial, -I suffix) |
| Package Type | 8-SOIJ (Small Outline Isolated J-lead, 208 mil) |
| Tipo de montagem | Surface Mount |
| Write Protection | Hardware (WP pin) and Software (status register block protect) |
| Special Features | HOLD pin, Page/Sector/Chip erase commands, status register, 32-byte write buffer |
| Status RoHS | Compliant |
Configuração de pinos do 25LC1024-I/SM
| Pino 1 | CS — Chip Select input, active low |
| Pino 2 | SO — Serial Output (MISO) - data shifted out on SCK falling edge |
| Pino 3 | WP — Write Protect, active high - protects upper array quadrant when asserted |
| Pino 4 | GND — Ground reference |
| Pino 5 | SI — Serial Input (MOSI) - data clocked in on SCK rising edge |
| Pino 6 | SCK — Serial Clock input |
| Pino 7 | HOLD — Hold input, active low - pauses serial communication without deselecting |
| Pino 8 | VCC — Supply voltage, 2.5 V to 5.5 V |
Aplicações típicas
25LC1024-I/SM é adequado para 6 aplicaçãos: Industrial PLC Parameter Storage, Automotive Subsystem Configuration Storage, Consumer Electronics User-Preference Storage, Medical Device Calibration Data Retention, Black-Box / Event Data Recorder (EDR) Storage, Smart Metering and Energy Monitor Backup.
Industrial PLC Parameter Storage
The 25LC1024-I/SM is widely used in industrial PLC and process-control modules to retain calibration coefficients, setpoints, and fault logs across power cycles. Its 2.5 V to 5.5 V supply range aligns directly with 3.3 V and 5 V PLC backplanes, and the 8-SOIJ J-lead package tolerates the vibration and thermal-cycling profiles of factory-floor cabinets. With 1 Mbit of byte-addressable non-volatile storage and >1M write-cycle endurance per page, the part easily supports years of parameter updates from PID loops and recipe tables. Hardware WP protection lets the firmware lock calibration sectors once commissioned.
Recomendado
Automotive Subsystem Configuration Storage
In automotive subsystems such as instrument clusters, HVAC controllers, and body-control modules, the 25LC1024-I/SM stores vehicle-configuration data, learned trim values, and DTC (diagnostic trouble code) history. The SPI bus interface allows the MCU to page-write configuration blocks in 256-byte chunks, while the HOLD pin permits the SPI bus to be shared with other peripherals during interrupt service routines. AEC-Q100 qualification is not standard for the -I/SM grade; for AEC-Q100-grade SPI EEPROM storage, automotive designs typically use the 25LC1024-E/SM or qualified equivalents.
Recomendado
Consumer Electronics User-Preference Storage
Set-top boxes, smart thermostats, audio receivers, and wearable devices use the 25LC1024-I/SM to store user preferences such as channel lineups, EQ curves, brightness levels, and pairing credentials. The 1 Mbit capacity holds tens of thousands of preference entries, while the 256-byte page-write enables rapid bulk saves when the user exits a settings menu. The 2.5 V minimum Vcc permits direct connection to single-cell Li-ion battery rails (3.0-4.2 V), eliminating the need for an additional boost converter in battery-powered designs.
Recomendado
Medical Device Calibration Data Retention
Medical devices such as blood-pressure monitors, infusion pumps, and portable diagnostic tools store factory calibration tables, battery-cycle counters, and service logs in the 25LC1024-I/SM. The >200-year data retention and >1M write endurance guarantee that calibration data remains intact across the device's full service life. The WP pin allows the manufacturer to lock calibration sectors while leaving user-accessible sectors writable, simplifying regulatory compliance with FDA 21 CFR Part 820 design-control documentation.
Recomendado
Black-Box / Event Data Recorder (EDR) Storage
Black-box and event-data recorder modules use the 25LC1024-I/SM as a non-volatile event log buffer for ride-share telemetry, fleet-management hardware, and industrial-machine fault records. The 256-byte page size and high write endurance support circular-buffer logging strategies that overwrite older entries after a configurable wrap depth. The HOLD pin allows the host MCU to suspend logging during system service, and the WP pin can be driven by a tamper-detection circuit to lock the log against unauthorized erasure.
Recomendado
Smart Metering and Energy Monitor Backup
Smart electricity, water, and gas meters store tariff schedules, calibration coefficients, and rolling consumption logs in the 25LC1024-I/SM. The wide 2.5-5.5 V supply matches the rectified mains-derived rails of typical meter designs, and the 200-year retention easily exceeds the 20-year service life of metering hardware. The 1 Mbit capacity is sufficient for hourly interval logs over multiple billing periods, while the small 8-SOIJ footprint minimizes PCB area in compact meter enclosures.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para 25LC1024-I/SM — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | 25AA1024T-I/SM | 25LC1024T-I/SM | 25AA1024-I/SM | 24LC1025-I/SM | 24LC1025T-I/SM |
|---|---|---|---|---|---|---|
| Package | 8-SOIJ (208 mil) | 8-SOIJ (208 mil) - same | 8-SOIJ (208 mil) - same | 8-SOIJ (208 mil) - same | 8-SOIJ (208 mil) - same | 8-SOIJ (208 mil) - same |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same |
| Memory Density | 1 Mbit (128K x 8) | 1 Mbit (128K x 8) | 1 Mbit (128K x 8) | 1 Mbit (128K x 8) | 1 Mbit (128K x 8) | 1 Mbit (128K x 8) |
| Supply Voltage Range | 2.5 V to 5.5 V | 1.8 V to 5.5 V | 2.5 V to 5.5 V | 1.8 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V |
| Interface | SPI (Mode 0/3) | SPI (Mode 0/3) | SPI (Mode 0/3) | SPI (Mode 0/3) | I2C (2-wire) | I2C (2-wire) |
| Max Clock Frequency | 20 MHz (at 5.5 V) | 20 MHz | 20 MHz | 20 MHz | 1 MHz (I2C) | 1 MHz (I2C) |
| Page Size | 256 bytes | 256 bytes | 256 bytes | 256 bytes | 128 bytes | 128 bytes |
| Write Endurance | >1,000,000 cycles/page | >1,000,000 cycles/page | >1,000,000 cycles/page | >1,000,000 cycles/page | >1,000,000 cycles/page | >1,000,000 cycles/page |
| HOLD Pin | Yes (active low) | Yes (active low) | Yes (active low) | Yes (active low) | No (I2C variant) | No (I2C variant) |
| Operating Temperature | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) |
Principais diferenciais
- Industry-standard SPI command set with Mode 0/3 compatibility (vs 24LC1025-I/SM)
- HOLD pin enables bus sharing without CS toggling (vs Generic SPI EEPROMs without HOLD)
- Sector and chip erase commands in addition to byte/page writes (vs Lower-density 25LC040/25LC256)
Notas de projeto
Place a 0.1 uF decoupling capacitor as close as possible to the VCC pin (Pin 8) of the 25LC1024-I/SM, with the ground return via a short trace to Pin 4 (GND). The SPI EEPROM draws brief peak currents during the internal charge-pump write cycle; insufficient decoupling causes Vcc droop that can corrupt writes. Place the EEPROM within 50 mm of the host MCU to keep SCK trace lengths short and avoid signal-integrity issues at 20 MHz.
Do not float the WP pin. Tie WP either directly to VCC (full array protected) or directly to GND (full array writable) through a controlled GPIO or hard-wired strap. A floating WP pin can drift into the indeterminate logic region during power-up, causing intermittent write failures. Likewise, the HOLD pin must be tied to VCC through a pull-up resistor if not used, because a floating HOLD pin can stall SPI transactions mid-byte.
Route the SPI bus signals (SCK, SI, SO, CS) as a parallel bus with matched trace lengths; keep SCK trace length below 30 mm at 20 MHz to avoid excessive ringing. Place a small series resistor (22-33 ohm) near the MCU SCK output to dampen reflections if the trace exceeds 25 mm. The SO line is high-impedance and should be guarded from noisy adjacent traces (switching converters, RF).
The 25LC1024-I/SM internal charge pump draws ~3 mA peak during page-write cycles. Ensure the upstream LDO can supply this transient without sagging; a 100 mA LDO is usually sufficient but verify with a scope probe on VCC at Pin 8 during a write. For battery-powered designs, gate the EEPROM VCC with a load switch and enable it only during read/write transactions to drop standby current to near-zero.
Informações de conformidade
RoHS compliant per Microchip product page. Not AEC-Q100 qualified; choose 25LC1024-E/SM extended-grade or automotive-grade equivalent for AEC-Q100 applications. Lead-free (Pb-free) per Microchip packaging marking.
