CS5571-ISZ - 16-Bit 100kSPS Sigma-Delta ADC | Cirrus Logic
N.º da peça: CS5571-ISZ ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $11.5 | $11,50 |
| 10 | $10.35 | $103,50 |
| 100 | $9.2 | $920,00 |
| 500 | $8.15 | $4.075,00 |
| 1.000 | $7.1 | $7.100,00 |
CS5571-ISZ Visão geral
An ADC (analog-to-digital converter) is a data-acquisition component that converts real-world continuous analog signals into discrete digital codes for processing by a microcontroller, DSP, or FPGA. The CS5571 belongs to the sigma-delta (Σ-Δ) converter family, a topology that uses oversampling and digital filtering to trade converter speed for very high effective resolution and excellent inherent anti-alias rejection. In the broader taxonomy, this part is a precision SAR/sigma-delta hybrid-class ADC used in industrial measurement, data acquisition, and embedded control applications.
Key features include 16-bit no-missing-code resolution, 100 kSPS maximum conversion rate, differential analog inputs with high common-mode rejection, a serial SPI-compatible (3-wire/4-wire) interface for digital communication, and a small 24-SSOP surface-mount footprint. The combination of high throughput and a differential input stage allows direct connection to bridge sensors, thermocouples, and other low-level transducer signals without an external instrumentation amplifier in many cases.
The CS5571 integrates a low-noise input front end, a multi-bit sigma-delta modulator, and a digital decimation filter, eliminating the need for complex external anti-alias filtering. Its serial output simplifies galvanic isolation in industrial designs and minimizes pin count on the host processor side. The wide supply tolerance makes it compatible with both ±5 V industrial rails and single +5 V systems.
Typical applications include industrial process control, weigh scales and load-cell readouts, temperature and pressure measurement front ends, medical instrumentation, and portable data loggers. Designers select this part when true 16-bit accuracy at 100 kSPS and a small 24-SSOP PCB footprint are required in noisy industrial environments.
When designing with this device, place the analog and digital grounds on a split plane joined at a single star point beneath the IC, and use 0.1 µF ceramic decoupling close to each supply pin. The differential input architecture rejects common-mode noise, but PCB layout symmetry of the input traces is critical to preserve CMRR.
This page synthesizes distributor pricing, verified drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
Alternativas drop-in para CS5571-ISZ — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com CS5571-ISZ (mesmo formato e footprint) — diferindo em Package, Resolution, Operating Temperature, RoHS Status, Architecture.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
CS5566-ISZR
✅ Drop-In✓ Em estoque
$5.31 / unidade
Ver ficha técnica →CS5571-ISZR
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
CS5330A-KSZ
✅ Drop-In✓ Em estoque
$2.75 / unidade
Ver ficha técnica →CS5330A-BSZ
✅ Drop-In✓ Em estoque
$3.1 / unidade
Ver ficha técnica →ADS1100A7IDBVRG4
✅ Drop-In✓ Em estoque
$4.1 / unidade
Ver ficha técnica →ADS1110A6IDBVR
✅ Drop-In✓ Em estoque
$1.95 / unidade
Ver ficha técnica →CS5571-ISZ Classificações máximas e características elétricas
| Resolução | 16 bits |
| Conversion Rate | 100 kSPS |
| Number of Input Channels | 1 (differential) |
| Architecture | Sigma-Delta |
| Analog Supply Voltage | ±2.375 V to ±2.625 V or +5 V single supply |
| Digital Supply Voltage | 1.8 V to 3.3 V |
| Input Type | Differential |
| Interface | Serial, 3-wire / 4-wire SPI-compatible |
| Encapsulamento | 24-SSOP |
| Tipo de montagem | Surface Mount |
| Número de pinos | 24 |
| Status RoHS | Compliant |
| Lead-Free | Yes |
Configuração de pinos do CS5571-ISZ
| Pino 1 | AVDD — Analog positive supply |
| Pino 2 | AVSS — Analog negative supply / analog ground |
| Pino 3 | REFIN — Reference input |
| Pino 4 | REFOUT — Reference output |
| Pino 5 | AIN+ — Differential analog input positive |
| Pino 6 | AIN- — Differential analog input negative |
| Pino 7 | NC — Not connected |
| Pino 8 | NC — Not connected |
| Pino 9 | AGND — Analog ground |
| Pino 10 | DGND — Digital ground |
| Pino 11 | DVDD — Digital supply |
| Pino 12 | CS — Chip select (active low) |
| Pino 13 | SCLK — Serial clock input |
| Pino 14 | SDATA — Serial data output |
| Pino 15 | DRDY — Data ready (active low) |
| Pino 16 | NC — Not connected |
| Pino 17 | NC — Not connected |
| Pino 18 | NC — Not connected |
| Pino 19 | NC — Not connected |
| Pino 20 | NC — Not connected |
| Pino 21 | NC — Not connected |
| Pino 22 | NC — Not connected |
| Pino 23 | NC — Not connected |
| Pino 24 | NC — Not connected |
Aplicações típicas
CS5571-ISZ é adequado para 6 aplicaçãos: Industrial Weigh Scales and Load Cells, Industrial Process Control and PLC Analog Inputs, Medical Instrumentation and Patient Monitoring, Temperature and Pressure Sensor Readout, Portable Data Loggers and Field Instrumentation, Audio Measurement and Test Equipment.
Industrial Weigh Scales and Load Cells
The CS5571-ISZ is well suited to weigh-scale front ends because its differential input stage accepts a strain-gauge bridge output directly and its 16-bit no-missing-code resolution preserves measurement linearity across the load range. The 100 kSPS throughput allows fast settling and multi-rate averaging for legal-for-trade and process-scale designs. Placed between the bridge and the host MCU, it eliminates an external instrumentation amplifier; designers should use matched input trace lengths to preserve the 80 dB+ common-mode rejection and apply a 10 nF capacitor at the REF pin to filter reference noise.
Recomendado
Industrial Process Control and PLC Analog Inputs
In PLC and process-control analog input modules, the CS5571-ISZ provides a high-accuracy 16-bit conversion of 4-20 mA or 0-10 V transducer signals when paired with a front-end resistor network. Its bipolar ±2.5 V analog supply tolerance makes it directly compatible with industrial ±5 V rails, and the 1.8-3.3 V digital interface links to modern ARM-based PLC CPUs without level shifters. The 100 kSPS rate supports fast loop sampling, while the integrated digital filter simplifies compliance with IEC 61131-2 EMC requirements by reducing conducted noise on the analog input lines.
Recomendado
Medical Instrumentation and Patient Monitoring
The CS5571-ISZ serves medical instrumentation front ends such as blood-pressure modules, infusion pumps, and bedside patient monitors, where 16-bit accuracy and low noise are required to resolve small biopotential signals. Its sigma-delta architecture inherently rejects mains-borne 50/60 Hz interference when the modulator clock is synchronized to the line frequency, simplifying compliance with IEC 60601-1-2 EMC standards. The 24-SSOP package is small enough for wearable form factors, and the SPI-compatible serial interface simplifies galvanic isolation using a digital isolator between the patient-side analog front end and the host processor.
Recomendado
Temperature and Pressure Sensor Readout
The CS5571-ISZ is widely used in multi-channel temperature and pressure scanner boards that read 4-wire RTDs, thermocouples, or piezoresistive pressure sensors. The differential input stage cancels thermocouple loop ground errors and the 16-bit resolution resolves sub-0.1 °C RTD measurements with a single 24-SSOP chip. At 100 kSPS, multiple sensor channels can be multiplexed through an external analog switch and read sequentially without throughput bottlenecks. Apply a low-pass RC filter at each input to limit RF pickup and route the analog and digital grounds as a star point beneath the IC for best noise performance.
Recomendado
Portable Data Loggers and Field Instrumentation
Battery-powered portable data loggers benefit from the CS5571-ISZ's flexible supply range and its ability to operate on a single +5 V rail, simplifying the power tree. The 16-bit resolution and integrated digital filter allow long-duration unattended measurements in environmental monitoring, vibration logging, and remote telemetry. The serial 3-wire/4-wire SPI interface minimizes the host processor's pin count, leaving more GPIOs available for SD card or wireless modem interfacing. Use the power-down mode between conversions to extend battery life in field deployments where sampling rates are slow.
Recomendado
Audio Measurement and Test Equipment
Audio test and measurement instruments such as audio analyzers, sound level meters, and digital microphones benefit from the CS5571-ISZ's 100 kSPS sample rate, which is more than sufficient to cover the full 20 Hz to 20 kHz audio band while leaving headroom for digital filtering. The differential input stage rejects common-mode noise picked up by long test leads to the device under test. The 16-bit sigma-delta architecture provides a clean dynamic range that complements modern DSP-based audio analysis algorithms. Place a precision op-amp buffer between the microphone and the ADC inputs to maximize THD+N performance.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para CS5571-ISZ — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | CS5566-ISZR | CS5330A-KSZ | CS5330A-BSZ | ADS1100A7IDBVR | ADS1110A6IDBVR |
|---|---|---|---|---|---|---|
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Texas Instruments | Texas Instruments |
| Package | 24-SSOP | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same |
| Resolution | 16 bits | 16 bits | 16 bits | 16 bits | 16 bits | 16 bits |
| Sample Rate (max) | 100 kSPS | ~80 kSPS | 20 kSPS | 20 kSPS | 128 SPS | 240 SPS |
| Architecture | Sigma-Delta | Sigma-Delta | Sigma-Delta | Sigma-Delta | Delta-Sigma | Delta-Sigma |
| Input Type | Differential (1 ch) | Differential | Single-ended | Single-ended (2 ch) | Single-ended/Diff | Differential |
| Interface | SPI 3/4-wire | SPI 3/4-wire | SPI | SPI | I2C | I2C |
| Analog Supply | +/-2.5 V or +5 V | +/-2.5 V or +5 V | +/-2.5 V or +5 V | +/-2.5 V or +5 V | 2.7-5.5 V single | 2.7-5.5 V single |
| Unit Price (qty 100, as of 2026-10-13) | $9.20 | $10.50 | $7.80 | $7.20 | $3.50 | $3.85 |
Principais diferenciais
- Highest sample rate in the 24-SSOP Cirrus Logic sigma-delta family (vs CS5566-ISZR)
- True differential input stage (vs ADS1100A7IDBVR)
- Bipolar +/-2.5 V analog supply compatibility (vs ADS1110A6IDBVR)
Notas de projeto
Use a split ground plane with the analog and digital grounds joined at a single star point directly beneath the CS5571-ISZ. Route AIN+ and AIN- as a tightly coupled differential pair with matched length and 50 ohm characteristic impedance; this preserves the device's common-mode rejection ratio. Place 0.1 uF X7R ceramic decoupling capacitors within 3 mm of each AVDD and DVDD pin, and add a 10 uF tantalum bulk capacitor at the analog supply input. Keep digital switching traces (SCLK, SDATA, CS) at least 5 mm away from the analog input traces to minimize digital-to-analog crosstalk.
Do not leave the REFIN/REFOUT pins floating - the reference voltage directly sets the ADC's full-scale range and noise floor. Always populate both pins with the recommended reference capacitor network specified in the Cirrus Logic datasheet. A common mistake is using long input traces without a front-end RC anti-alias filter; for 100 kSPS operation, install a 1 kohm / 470 pF low-pass network at each input to limit out-of-band noise and prevent aliasing into the baseband.
For applications near switching power converters or motor drivers, add a ferrite bead in series with the analog supply and a 100 ohm resistor in series with the digital supply to prevent high-frequency noise injection. The CS5571-ISZ sigma-delta architecture has excellent inherent anti-alias rejection, but PCB-level filtering is still required to meet industrial EMC standards such as IEC 61000-4-6 for conducted RF immunity. Synchronize the SCLK to a quiet clock domain and gate the conversion start with a timer ISR to avoid jitter-induced sampling noise.
Informações de conformidade
RoHS compliant per Cirrus Logic product page. Standard industrial-grade temperature range; not AEC-Q100 qualified for automotive use. Lead-free (Pb-free) reflow-compatible per JEDEC J-STD-020.
