MAX162BCNG+ - 12-Bit 3µs SAR ADC, 24-PDIP | Maxim Integrated
N.º da peça: MAX162BCNG+ ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $12.5 | $12,50 |
| 10 | $11.25 | $112,50 |
| 100 | $9.95 | $995,00 |
| 500 | $8.85 | $4.425,00 |
| 1.000 | $7.5 | $7.500,00 |
MAX162BCNG+ Visão geral
An SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm to digitize an analog input in N clock cycles for N-bit resolution. SAR ADCs sit in the data-converter hierarchy between flash converters (fastest, lowest resolution) and sigma-delta converters (highest resolution, slowest). They are the workhorse of mid-speed, mid-resolution industrial instrumentation, motor control, and process control applications where both speed and precision matter.
The MAX162BCNG+ provides 12-bit resolution with no missing codes, a built-in buried-zener reference delivering low drift and low noise, and a track-and-hold front end that handles input bandwidths well beyond the Nyquist limit of its 3 µs conversion rate. The parallel interface simplifies connection to standard 8-bit and 16-bit microprocessors without glue logic, and the commercial 0 °C to +70 °C operating range targets bench-test, factory-floor, and embedded industrial designs.
Typical applications include digital signal processing front ends, precision industrial process control loops, high-speed data acquisition boards, and audio digitizing systems. The on-chip reference also makes the part attractive for portable instrumentation where external reference count is undesirable. The MX7572 superset pin compatibility offers designers a software-compatible upgrade path to longer integration or slower conversion for cost-sensitive designs.
When laying out a MAX162BCNG+ circuit, place 0.1 µF and 10 µF decoupling capacitors within 5 mm of each supply pin and keep analog and digital grounds separated back to a single-point star ground at the ADC. Avoid routing digital outputs directly under the analog input pin to prevent digital-noise coupling into the high-impedance sample-and-hold node. This page synthesizes distributor pricing, parametric drop-in alternatives (including the pin-compatible MAX162CCNG+, MAX162ACNG+, and MX7572-family variants), and PCB-layout design notes not found in the manufacturer datasheet alone.
Alternativas drop-in para MAX162BCNG+ — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com MAX162BCNG+ (mesmo formato e footprint) — diferindo em Package, Conversion Time, Sampling Rate, Mounting Type, Input Voltage Range.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
MAX162CCNG+
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
MAX162ACNG+
✅ Drop-In✓ Em estoque
$10.85 / unidade
Ver ficha técnica →MAX162BCNG
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
MX7572JN
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
MAX132CNG
✅ Drop-In✓ Em estoque
$13.7 / unidade
Ver ficha técnica →MAX128BCNG
✅ Drop-In✓ Em estoque
$10.27 / unidade
Ver ficha técnica →MAX162BCNG+ Classificações máximas e características elétricas
| Resolução | 12 bits |
| Number of Inputs | 1 |
| Conversion Time | 3 µs (MAX162) |
| Architecture | SAR (Successive Approximation) |
| Input Type | Single-Ended |
| Data Interface | Parallel |
| Configuration | S/H-ADC (Sample-and-Hold ADC) |
| Reference Type | Internal (buried-zener) |
| Operating Supply Voltage (Digital) | +5 V |
| Operating Supply Voltage (Analog) | -12 V to -15 V |
| Faixa de temperatura de operação | 0 °C to +70 °C (Commercial, C-grade) |
| Encapsulamento | 24-PDIP (0.300 inch, 7.62 mm) |
| Tipo de montagem | Through-Hole |
| Terminal Form | Through-Hole |
| Number of Terminals | 24 |
Configuração de pinos do MAX162BCNG+
| Pino 1 | AIN — Analog input |
| Pino 2 | AGND — Analog ground |
| Pino 3 | REF — Reference voltage (internal buried-zener) |
| Pino 4 | VEE — Negative analog supply (-12 V to -15 V) |
| Pino 5 | AVDD — Analog +5 V supply |
| Pino 6 | DB11 — Data bit 11 (MSB) |
| Pino 7 | DB10 — Data bit 10 |
| Pino 8 | DB9 — Data bit 9 |
| Pino 9 | DB8 — Data bit 8 |
| Pino 10 | DB7 — Data bit 7 |
| Pino 11 | DB6 — Data bit 6 |
| Pino 12 | DB5 — Data bit 5 |
| Pino 13 | DB4 — Data bit 4 |
| Pino 14 | DGND — Digital ground |
| Pino 15 | DB3 — Data bit 3 |
| Pino 16 | DB2 — Data bit 2 |
| Pino 17 | DB1 — Data bit 1 |
| Pino 18 | DB0 — Data bit 0 (LSB) |
| Pino 19 | DVDD — Digital +5 V supply |
| Pino 20 | CS — Chip select (active low) |
| Pino 21 | RD — Read strobe (active low) |
| Pino 22 | BUSY — Conversion-in-progress status output |
| Pino 23 | CLK — Clock input (internal or external) |
| Pino 24 | CONVST — Conversion start trigger |
Aplicações típicas
MAX162BCNG+ é adequado para 6 aplicaçãos: Industrial Process Control Loops, High-Speed Data Acquisition Boards, Audio Digitizing and DSP Front Ends, Precision Instrumentation and Test Equipment, Motor Control and Servo Drive Systems, Embedded Microprocessor Analog Input Modules.
Industrial Process Control Loops
The MAX162BCNG+ fits closed-loop industrial process control where 12-bit resolution and 3 µs conversion time digitize 4-20 mA / 0-10 V transducer signals for PID controllers. Its 12-bit no-missing-codes performance and on-chip buried-zener reference deliver the linearity needed for valve positioning and flow-meter feedback, eliminating the external reference that would otherwise drift in plant-floor temperature swings. The +5 V digital and -12 V to -15 V analog split-rail supply architecture provides excellent digital-noise immunity because the parallel data bus is referenced to a clean digital ground separate from the analog front end. Compared with sigma-delta converters, the MAX162BCNG+'s SAR architecture settles in microseconds rather than milliseconds, making it appropriate for multi-channel multiplexed control loops where the controller must scan several sensors per control period.
Recomendado
High-Speed Data Acquisition Boards
The MAX162BCNG+'s 3 µs SAR conversion and parallel 12-bit data interface suit it to PC-based and embedded data acquisition cards sampling multiple analog channels through an external MUX. Each conversion completes in 3 µs so a 16-channel system can scan at aggregate rates beyond 20 kS/s aggregate, with the on-chip track-and-hold front end eliminating the need for an external SHA. The internal buried-zener reference provides low drift and low noise, important when digitizing thermocouple and strain-gauge signals whose accuracy depends directly on reference stability. The 24-PDIP through-hole package suits legacy ISA and PCI digitizer boards as well as modern DIN-rail industrial I/O modules where through-hole components are still preferred for repairability.
Recomendado
Audio Digitizing and DSP Front Ends
The MAX162BCNG+ provides 12-bit resolution at 3 µs conversion, supporting audio-bandwidth sampling rates well beyond 100 kS/s when used in single-channel mode. Its internal track-and-hold input bandwidth exceeds the Nyquist requirement for 20 kHz audio, and the on-chip reference avoids the ground-noise coupling that an external reference can introduce to low-level analog audio inputs. The split +5 V / -12 V to -15 V supply rails keep the analog front end on a dedicated negative supply, which is the preferred topology for audio CODEC and DSP front ends where digital switching noise from the parallel data bus must be rejected. This makes the MAX162BCNG+ suitable for pro-audio test equipment, ultrasonic instrumentation, and vibration-monitoring systems that need clean 12-bit digitization at audio rates.
Recomendado
Precision Instrumentation and Test Equipment
Bench-top multimeters, oscilloscope digitizer front ends, and laboratory data loggers benefit from the MAX162BCNG+'s 12-bit no-missing-codes linearity and on-chip buried-zener reference. The reference eliminates calibration drift over the 0 °C to +70 °C commercial range, reducing factory-calibration cost and field-recalibration cycles. The 3 µs conversion allows these instruments to capture transient signals such as switching-supply ripple and motor inrush without aliasing. Through-hole 24-PDIP packaging supports hand-soldered prototypes and legacy test fixtures where surface-mount parts would be inconvenient for the engineering lab.
Recomendado
Motor Control and Servo Drive Systems
The MAX162BCNG+'s 3 µs SAR conversion time matches the control-loop update rates required for DC and stepper servo drives reading current, position, or speed feedback. The 12-bit resolution delivers the dynamic range needed to digitize shunt-resistor current-sense signals spanning tens of millivolts to several volts through a single-ended input. The +5 V digital and -12 V to -15 V analog supply rails are native to industrial servo drives, where the analog front end often runs from -15 V to interface with op-amp current-sense circuits. The on-chip reference removes one source of gain drift that would otherwise force periodic recalibration of the drive's torque loop.
Recomendado
Embedded Microprocessor Analog Input Modules
The MAX162BCNG+'s parallel 12-bit interface maps directly onto 8-bit and 16-bit microprocessor data buses without glue logic, making it the canonical ADC for embedded modules based on 8051, 68HC11, and similar legacy microcontrollers. The chip-select and read strobe inputs implement a single-instruction read cycle, freeing the CPU from bit-banging timing loops. The split-rail supply architecture allows the digital bus to operate from +5 V while the analog front end uses -12 V to -15 V common in industrial PLC I/O modules. Through-hole PDIP packaging suits legacy and new embedded modules where field-replaceable components are valued for serviceability.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para MAX162BCNG+ — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | MAX162CCNG+ | MAX162ACNG+ | MAX162BCNG | MX7572JN | MAX132CNG | MAX128BCNG |
|---|---|---|---|---|---|---|---|
| Package | 24-PDIP | 24-PDIP - same | 24-PDIP - same | 24-PDIP - same | 24-PDIP - same | 24-PDIP - same | 24-PDIP - same |
| Brand | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits |
| Operating Temperature | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C |
| Supply Voltages | +5 V digital, -12 V to -15 V analog | +5 V / -12 V to -15 V | +5 V / -12 V to -15 V | +5 V / -12 V to -15 V | +12 V to +15 V single supply | +3 V single supply | +5 V / -12 V to -15 V |
| Data Interface | Parallel 12-bit | Parallel 12-bit | Parallel 12-bit | Parallel 12-bit | Parallel 12-bit | Parallel 12-bit | Parallel 12-bit |
Principais diferenciais
- Higher-accuracy C-grade drop-in available in identical footprint (vs MAX162BCNG (non-RoHS, same B-grade))
- Pin-compatible with MX7572 for speed/power trade-offs (vs MX7572JN)
- Complete integration reduces external component count (vs MAX132CNG (+12 V single-supply 12-bit ADC))
Notas de projeto
Use a single-point star ground tie between AGND and DGND, located within 10 mm of the ADC. Place 0.1 µF and 10 µF decoupling capacitors within 5 mm of each supply pin (AVDD, DVDD, VEE). Keep the analog input trace short and guard it with AGND on both sides to minimize digital-noise coupling from the parallel data bus. Estimated: with proper star grounding the converter typically achieves >70 dB PSRR from the +5 V rail, sufficient to reject digital switching noise in 12-bit systems.
Do not assume the internal buried-zener reference eliminates the need for an external bypass capacitor on the REF pin - the datasheet recommends a 0.1 µF ceramic plus a 10 µF tantalum directly at the REF pin to filter the reference output. Driving AIN with source impedance above 1 kΩ degrades conversion accuracy because the internal track-and-hold has finite acquisition time; insert a low-impedance buffer amplifier if your source exceeds 1 kΩ. Do not apply an analog input before the +5 V digital supply has ramped past 4.5 V or latch-up may occur in CMOS input structures.
Route the 12 parallel data outputs (DB0-DB11) as a matched-length group to maintain bus-timing integrity, and place a 74HC244 or 74HCT244 buffer between the ADC outputs and any noisy digital bus if the cable to the host microprocessor exceeds 50 mm. Locate the BUSY, RD, and CS control traces on a separate digital layer from the analog input trace. Keep clock and conversion-start signals away from the AIN pin by at least 5 mm to avoid strobe-noise coupling into the high-impedance sample capacitor.
Informações de conformidade
RoHS compliance inferred from the "+" suffix in the part number per Maxim/Analog Devices ordering convention. The "+" suffix denotes lead-free packaging introduced across Maxim's product line in 2005. REACH, halogen-free status, and conflict-minerals declarations not verified in the provided data.
