PIC18F86J11-I/PT - 8-Bit 48MHz MCU, 64KB Flash 80-TQFP | Microchip
N.º da peça: PIC18F86J11-I/PT ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $8.5 | $8,50 |
| 10 | $7.65 | $76,50 |
| 100 | $6.8 | $680,00 |
| 500 | $6.1 | $3.050,00 |
| 1.000 | $5.4 | $5.400,00 |
PIC18F86J11-I/PT Visão geral
A PIC18 microcontroller is an 8-bit Harvard-architecture MCU from Microchip that sits in the company's mid-to-high tier of 8-bit devices. The PIC18 family sits in the hierarchy: 8-bit MCU -> PIC18 family -> PIC18FxxJxx (Flash, 3 V optimized) -> power management and connectivity ICs. Compared with the older PIC16 family, PIC18 parts add a wider instruction set, larger linear code space, more peripherals, and richer interrupt handling, making them the workhorse choice when engineers need more I/O and memory than a PIC16 can offer but do not need to step up to a 16-bit dsPIC or 32-bit device.
Key features include a 20-bit address bus capable of addressing up to 1 Mbit of Flash, two 8-bit and three 16-bit timers, two synchronous serial ports (I2C and SPI), two asynchronous serial ports (USART with LIN support), a 10-bit ADC, and two analog comparators. The device supports up to 12 MIPS operation at 3.0 V typical supply, with an operating voltage range of 2.0 V to 3.6 V and an industrial temperature range of -40 C to +85 C. The -I/PT suffix indicates industrial temperature grade in TQFP package.
Architecturally, the PIC18F86J11 uses an enhanced Harvard architecture with separate program Flash and data EEPROM/SRAM paths, a 32-level hardware stack, and an 8x8 hardware multiply engine. The 10-bit ADC provides up to 16 channels, and the device includes nanoWatt Technology power management with idle and sleep modes drawing microamp-level currents, suitable for battery-powered or energy-conscious designs.
Typical applications include industrial control and HMI panels, automotive body and comfort modules, USB and connectivity bridges, sensor aggregation nodes, and consumer appliance main controllers. The 80-pin TQFP package exposes ample I/O for parallel displays, keypads, and multiple serial channels concurrently.
When designing with this part, allocate sufficient decoupling (100 nF plus bulk) near each VDD/VSS pair and follow Microchip's recommended trace geometry for the 48 MHz oscillator. The Flash is rated for 1k erase/write cycles minimum, so use EEPROM emulation or external storage for high-write-count applications.
This page synthesizes distributor pricing, same-brand drop-in alternatives, and practical design notes not aggregated in a single manufacturer datasheet.
Alternativas drop-in para PIC18F86J11-I/PT — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC18F86J11-I/PT (mesmo formato e footprint) — diferindo em Package, Program Memory (Flash), Core Architecture, Operating Temperature, Timers.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC18F86J10-I/PT
✅ Drop-In✓ Em estoque
$6.1 / unidade
Ver ficha técnica →PIC18F87J11-I/PT
✅ Drop-In✓ Em estoque
$6.3 / unidade
Ver ficha técnica →PIC18F85J11-I/PT
✅ Drop-In✓ Em estoque
$3.76 / unidade
Ver ficha técnica →PIC18F86J16-I/PT
✅ Drop-In✓ Em estoque
$7.1 / unidade
Ver ficha técnica →PIC18F85K90-E/PT
✅ Drop-In✓ Em estoque
$3.62 / unidade
Ver ficha técnica →PIC18F85J90-I/PT
✅ Drop-In ⚠️ Especificações não verificadas✓ Em estoque
$4.5 / unidade
Ver ficha técnica →PIC18F86J11-I/PT Classificações máximas e características elétricas
| Core Architecture | PIC18, 8-bit RISC |
| Program Memory (Flash) | 64 KB (32K x 16) |
| Data RAM | 3.9 KB (on-chip SRAM) |
| Maximum CPU Frequency | 48 MHz |
| MIPS Performance | 12 MIPS |
| Supply Voltage (VDD) | 2.0 V to 3.6 V |
| Temperatura de operação | -40 C to +85 C (Industrial) |
| Encapsulamento | 80-pin TQFP (PT), 12x12 mm |
| ADC | 10-bit, up to 16 channels |
| Timers | 2 x 8-bit + 3 x 16-bit |
| Communication Interfaces | 2x SPI/I2C + 2x USART (LIN-capable) |
| Analog Comparators | 2 |
| Address Bus Width | 20-bit (up to 1 Mbit Flash addressing) |
| Tipo de montagem | Surface Mount |
| Status RoHS | Compliant |
| Automotive Qualified | Recommended for automotive design (special order codes) |
Configuração de pinos do PIC18F86J11-I/PT
| Pino 1 | RH0/PMD0 — Port H I/O bit 0 / Parallel Master Port data 0 |
| Pino 2 | RH1/PMD1 — Port H I/O bit 1 / PMP data 1 |
| Pino 3 | RH2/PMD2 — Port H I/O bit 2 / PMP data 2 |
| Pino 4 | RH3/PMD3 — Port H I/O bit 3 / PMP data 3 |
| Pino 5 | RH4/PMD4 — Port H I/O bit 4 / PMP data 4 |
| Pino 6 | RH5/PMD5 — Port H I/O bit 5 / PMP data 5 |
| Pino 7 | RH6/PMD6 — Port H I/O bit 6 / PMP data 6 |
| Pino 8 | RH7/PMD7 — Port H I/O bit 7 / PMP data 7 |
| Pino 9 | VSS — Ground reference |
| Pino 10 | VDD — Positive supply voltage (2.0 V to 3.6 V) |
| Pino 11 | AVDD — Analog positive supply |
| Pino 12 | AVSS — Analog ground reference |
| Pino 13 | OSC1/CLKIN — Crystal oscillator input / external clock input |
| Pino 14 | OSC2/CLKOUT — Crystal oscillator output / clock output |
| Pino 15 | RC0/T1OSO — Port C I/O / Timer1 oscillator output |
| Pino 16 | RC1/T1OSI — Port C I/O / Timer1 oscillator input |
| Pino 17 | RC2/CCP1 — Port C I/O / Capture/Compare/PWM 1 |
| Pino 18 | RC3/SCK1/SCL1 — Port C I/O / SPI1 clock / I2C1 clock |
| Pino 19 | RC4/SDI1/SDA1 — Port C I/O / SPI1 data in / I2C1 data |
| Pino 20 | RC5/SDO1 — Port C I/O / SPI1 data out |
| Pino 21 | RC6/TX1/CK1 — Port C I/O / USART1 TX / clock |
| Pino 22 | RC7/RX1/DT1 — Port C I/O / USART1 RX / data |
| Pino 23 | RD0/PSP0 — Port D I/O / Parallel Slave Port 0 |
| Pino 24 | RD1/PSP1 — Port D I/O / PSP 1 |
| Pino 25 | RD2/PSP2 — Port D I/O / PSP 2 |
| Pino 26 | RD3/PSP3 — Port D I/O / PSP 3 |
| Pino 27 | RD4/PSP4 — Port D I/O / PSP 4 |
| Pino 28 | RD5/PSP5 — Port D I/O / PSP 5 |
| Pino 29 | RD6/PSP6 — Port D I/O / PSP 6 |
| Pino 30 | RD7/PSP7 — Port D I/O / PSP 7 |
| Pino 31 | VSS — Ground reference |
| Pino 32 | VDD — Positive supply voltage (2.0 V to 3.6 V) |
| Pino 33 | RE0/RD/AN5 — Port E I/O / Read strobe / Analog input 5 |
| Pino 34 | RE1/WR/AN6 — Port E I/O / Write strobe / Analog input 6 |
| Pino 35 | RE2/CS/AN7 — Port E I/O / Chip select / Analog input 7 |
| Pino 36 | RE3/ADERR — Port E I/O / Address error |
| Pino 37 | RE4/LVDIN — Port E I/O / Low-voltage detect input |
| Pino 38 | RE5/AN8 — Port E I/O / Analog input 8 |
| Pino 39 | RE6/AN9 — Port E I/O / Analog input 9 |
| Pino 40 | RE7/CCP2/AN10 — Port E I/O / CCP2 / Analog input 10 |
| Pino 41 | RF0/AN11 — Port F I/O / Analog input 11 |
| Pino 42 | RF1/AN12/C2OUT — Port F I/O / Analog input 12 / Comparator 2 output |
| Pino 43 | RF2/AN13/C1OUT — Port F I/O / Analog input 13 / Comparator 1 output |
| Pino 44 | RF3/AN14 — Port F I/O / Analog input 14 |
| Pino 45 | RF4/AN15 — Port F I/O / Analog input 15 |
| Pino 46 | RF5/AN16 — Port F I/O / Analog input 16 |
| Pino 47 | RF6/AN17 — Port F I/O / Analog input 17 |
| Pino 48 | RF7/SS1 — Port F I/O / SPI1 slave select |
| Pino 49 | RG0/ECCP3/P3A — Port G I/O / Enhanced CCP3 / PWM output 3A |
| Pino 50 | RG1/TX2/CK2 — Port G I/O / USART2 TX / clock |
| Pino 51 | RG2/RX2/DT2 — Port G I/O / USART2 RX / data |
| Pino 52 | RG3/CCP3/P3D — Port G I/O / CCP3 / PWM output 3D |
| Pino 53 | RG4/CCP4/P1D — Port G I/O / CCP4 / PWM output 1D |
| Pino 54 | RG5/CCP5/P2D — Port G I/O / CCP5 / PWM output 2D |
| Pino 55 | RG6/ECCP2/P2A — Port G I/O / Enhanced CCP2 / PWM output 2A |
| Pino 56 | RG7/ECCP1/P1A — Port G I/O / Enhanced CCP1 / PWM output 1A |
| Pino 57 | VSS — Ground reference |
| Pino 58 | VDD — Positive supply voltage (2.0 V to 3.6 V) |
| Pino 59 | RA0/AN0 — Port A I/O / Analog input 0 |
| Pino 60 | RA1/AN1 — Port A I/O / Analog input 1 |
| Pino 61 | RA2/AN2/VREF- — Port A I/O / Analog input 2 / VREF- |
| Pino 62 | RA3/AN3/VREF+ — Port A I/O / Analog input 3 / VREF+ |
| Pino 63 | RA4/T0CKI — Port A I/O / Timer0 clock input |
| Pino 64 | RA5/AN4/SS2/HLVDIN — Port A I/O / Analog input 4 / SPI2 slave select / High/Low voltage detect |
| Pino 65 | RB0/INT0/FLT0 — Port B I/O / External interrupt 0 / PWM fault 0 |
| Pino 66 | RB1/INT1 — Port B I/O / External interrupt 1 |
| Pino 67 | RB2/INT2 — Port B I/O / External interrupt 2 |
| Pino 68 | RB3/INT3/ECCP2/P2A — Port B I/O / External interrupt 3 / ECCP2 / PWM output 2A |
| Pino 69 | RB4/KBI0 — Port B I/O / Keyboard interrupt 0 |
| Pino 70 | RB5/KBI1 — Port B I/O / Keyboard interrupt 1 |
| Pino 71 | RB6/KBI2/PGC — Port B I/O / Keyboard interrupt 2 / ICSP clock |
| Pino 72 | RB7/KBI3/PGD — Port B I/O / Keyboard interrupt 3 / ICSP data |
| Pino 73 | MCLR/RE3 — Master clear (reset) input |
| Pino 74 | RJ0 — Port J I/O bit 0 |
| Pino 75 | RJ1 — Port J I/O bit 1 |
| Pino 76 | RJ2 — Port J I/O bit 2 |
| Pino 77 | RJ3 — Port J I/O bit 3 |
| Pino 78 | RJ4 — Port J I/O bit 4 |
| Pino 79 | RJ5 — Port J I/O bit 5 |
| Pino 80 | RJ6 — Port J I/O bit 6 |
Aplicações típicas
PIC18F86J11-I/PT é adequado para 6 aplicaçãos: Industrial Control and HMI Panels, Automotive Body and Comfort Modules, USB Connectivity Bridges and Sensor Aggregators, Consumer Appliance Main Controllers, Embedded Display and Keypad Controllers, Test and Measurement Front-End Controllers.
Industrial Control and HMI Panels
The PIC18F86J11-I/PT is well suited to industrial control panels and human-machine interface (HMI) front-ends because it combines 64 KB of Flash for protocol stacks and graphics state machines with 80-pin TQFP package offering ample I/O for keypads, character or graphic LCDs, and indicator LEDs. Its 12 MIPS performance at 48 MHz handles polling of multiple input channels while executing Modbus RTU or proprietary serial protocols over the two integrated USARTs. The nanoWatt sleep modes allow duty-cycled battery-backed operation in remote panels, and the -40 C to +85 C industrial temperature range tolerates factory-floor thermal stress. Estimated active current draw of 15-20 mA at 48 MHz and 3.3 V is acceptable when paired with a low-dropout regulator and bulk decoupling.
Recomendado
Automotive Body and Comfort Modules
With Microchip's recommendation for automotive design and special AEC-Q100 ordering codes, the PIC18F86J11-I/PT family is a credible candidate for body control modules (BCMs), lighting controllers, and HVAC user interfaces. The 20-bit program counter supports in-field firmware upgrades via the LIN or CAN-capable USARTs, while the 10-bit ADC with up to 16 channels reads analog sensor inputs such as temperature, light, and position. The wide operating voltage of 2.0 V to 3.6 V tolerates automotive cranking transients when paired with proper TVS protection. Estimated: design must include reverse-battery and load-dump protection at VDD, as the MCU has no internal automotive transient suppression.
Recomendado
USB Connectivity Bridges and Sensor Aggregators
Although the PIC18F86J11-I/PT lacks native USB, it can serve as a sensor-aggregation bridge that streams data over USB CDC class through an external UART-to-USB converter such as the MCP2200 or MCP2221. The 64 KB Flash accommodates USB command parsers and HID report descriptors, while 3.9 KB of SRAM holds transaction buffers. Two SPI ports allow simultaneous connection of an SD card and a sensor front-end, with the MCU's DMA-free interrupt-driven architecture keeping latency predictable at 12 MIPS. The 80-pin TQFP package supports parallel LCD or OLED panels for status displays, making the design suitable for handheld instruments or factory-floor diagnostic tools.
Recomendado
Consumer Appliance Main Controllers
The PIC18F86J11-I/PT's 64 KB Flash and 3.9 KB SRAM comfortably fit appliance firmware for washing machines, dishwashers, induction cookers, and microwave ovens. Its 12 MIPS at 48 MHz is sufficient for motor control loops using timer interrupts and PWM, while the 10-bit ADC reads multiple temperature sensors and water-level probes simultaneously. The industrial -40 C to +85 C range covers under-cabinet and engine-adjacent enclosures, and the 80-TQFP package exposes I/O for inverter bridge control signals and seven-segment or TFT status displays. Estimated: at full peripheral load and 48 MHz, total system current is around 30-40 mA, easily managed by a small buck regulator.
Recomendado
Embedded Display and Keypad Controllers
With up to 70 I/O pins on the 80-pin TQFP package, the PIC18F86J11-I/PT can directly drive character LCDs, small graphical OLED panels, and 8x8 or larger keypads without external logic. The hardware 8x8 multiplier accelerates button-debounce and menu navigation code, and the dual USARTs allow simultaneous debugging via UART and field-upgrade communication. Power consumption scales with clock and peripheral activity, with idle mode dropping current to single-digit milliamps when the display refresh timer is the only active peripheral. According to the Microchip datasheet, the integrated 8 MHz internal oscillator option simplifies designs where external crystals are undesirable.
Recomendado
Test and Measurement Front-End Controllers
Bench-top test instruments benefit from the PIC18F86J11-I/PT's combination of two USARTs (one for command interface, one for data streaming) plus two SPI ports for ADC, DAC, and digital potentiometer control. The 10-bit, 16-channel ADC provides adequate resolution for general-purpose voltage and current monitoring, while the 12 MIPS core executes calibration math and UART formatting in real time. The 64 KB Flash supports USB CDC command libraries, SCPI parsers, or vendor-proprietary protocols. The 80-pin TQFP's grounding scheme and exposed thermal pad assist EMI-sensitive analog measurements when combined with proper PCB partitioning.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC18F86J11-I/PT — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC18F86J10-I/PT | PIC18F87J11-I/PT | PIC18F85J11-I/PT | PIC18F86J16-I/PT | PIC18F85K90-E/PT | PIC18F85J90-I/PT |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 80-pin TQFP (PT) | 80-pin TQFP (PT) - same | 80-pin TQFP (PT) - same | 64-pin TQFP (PT) - smaller footprint | 80-pin TQFP (PT) - same | 80-pin TQFP (PT) - same | 80-pin TQFP (PT) - same |
| Program Memory (Flash) | 64 KB | 64 KB | 128 KB | 64 KB | 96 KB | 32 KB | 32 KB |
| Data RAM | 3.9 KB | 3.9 KB | 3.9 KB | 3.9 KB | 3.9 KB | 2 KB | 2 KB |
| Maximum Frequency | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 64 MHz | 48 MHz |
| Core Architecture | PIC18 8-bit | PIC18 8-bit | PIC18 8-bit | PIC18 8-bit | PIC18 8-bit | PIC18 8-bit (K-series, eXtreme Low Power) | PIC18 8-bit |
| Supply Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 1.8 V to 5.5 V | 2.0 V to 3.6 V |
| Operating Temperature | -40 C to +85 C (Industrial) | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +125 C (Extended) | -40 C to +85 C |
Principais diferenciais
- Silicon enhancement upgrade path within same 80-TQFP footprint (vs PIC18F86J10-I/PT)
- Doubled Flash headroom in same package (vs PIC18F87J11-I/PT)
- Wider supply voltage tolerance for battery applications (vs PIC18F85K90-E/PT)
Notas de projeto
Place one 100 nF X7R ceramic bypass capacitor as close as possible to every VDD/VSS pair (pins 10/9, 32/31, 58/57), plus one 10 uF bulk capacitor on the main VDD rail. AVDD/AVSS at pins 11/12 should have their own 100 nF and 10 uF caps to isolate analog supply noise from the digital core. Use a dedicated LDO such as MCP1700-3302E for the analog rail to keep ADC readings clean at 10-bit resolution.
The 80-pin TQFP (12x12 mm) requires a 4-layer PCB minimum for clean impedance control of the 48 MHz oscillator traces. Keep crystal traces (OSC1/OSC2) as short as possible (under 10 mm) and surrounded by a ground guard ring. Separate analog and digital ground planes with a single connection point near the AVSS pin to avoid ground-loop noise coupling into the ADC.
Do not exceed the absolute maximum VDD of 4.0 V; the PIC18F86J11-I/PT is a 3.3 V part and lacks 5 V tolerance on I/O. The MCLR/RE3 pin (pin 73) requires a 10 kohm pull-up to VDD for normal operation and a 100 nF capacitor for decoupling; an ICSP programmer must be able to drive MCLR low for programming. Flash endurance is rated at 1k erase/write cycles minimum, so use EEPROM emulation or external SPI Flash for high-write-count data logging applications.
When using the Parallel Master Port (PMP) or Parallel Slave Port (PSP) on ports D/H/J, route the parallel data bus with matched trace lengths (delta under 5 mm) and a 33 ohm series damping resistor on each output to suppress overshoot on the 80 TQFP pin fan-out. The two USARTs support LIN by default; add a 1 kohm pull-up on the LIN bus per the LIN specification if used in an automotive network.
Informações de conformidade
Standard -I/PT part is industrial grade (-40 C to +85 C). For AEC-Q100 automotive qualification, special ordering codes are required per Microchip product page; standard -I/PT is not AEC-Q100 qualified.