SI1553DL-T1-GE3 - Complementary 20V MOSFET Array | Vishay
N.º da peça: SI1553DL-T1-GE3 ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $0.42 | $0,42 |
| 10 | $0.37 | $3,70 |
| 100 | $0.28 | $28,00 |
| 500 | $0.22 | $110,00 |
| 1.000 | $0.18 | $180,00 |
| 3.000 | $0.14 | $420,00 |
SI1553DL-T1-GE3 Visão geral
A complementary MOSFET pair (N-channel + P-channel on one substrate) is a building block for low-power switching applications where symmetrical high-side / low-side or push-pull drive is needed without using two discrete transistors. The two MOSFETs share the same 20 V VDS rating and 2.5 V gate-source threshold range, allowing them to be driven from the same logic-level control signal without level translation. By integrating both polarities in one SC-70 package, designers can halve the board footprint of equivalent discrete solutions and improve channel-to-channel thermal and parametric matching.
Key features include a low on-resistance of approximately 0.32 ohm at VGS = 4.5 V (N-channel) and 0.5 ohm (P-channel), making the part efficient for portable and battery-powered designs. The TrenchFET process technology minimizes RDS(on) per unit area, while 2.5 V gate threshold supports direct drive from 1.8 V and 3.3 V microcontroller GPIO outputs with logic-level enhancement. The SC-70-6 package provides a compact 2.0 x 1.25 mm footprint suited for handheld and wearable products, and the device is qualified over the -55C to +150C junction temperature range.
Typical applications include load switching in portable electronics, signal-level shifting between domains of different voltage rails, analog multiplexer / demultiplexer building blocks, and complementary push-pull drivers for small DC fans, relays, or LED strings. The small footprint also suits wearable health monitors and IoT sensor nodes where PCB area is at a premium.
When designing with this device, note that the N-channel and P-channel devices share the same SC-70 pinout but are not interchangeable with single-channel equivalents. Plan gate-drive RC snubbers and ensure VGS never exceeds the absolute maximum of +/- 8 V. For high-frequency circuits, keep the gate-loop PCB inductance low to prevent unintended ringing during switching transitions.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Alternativas drop-in para SI1553DL-T1-GE3 — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com SI1553DL-T1-GE3 (mesmo formato e footprint) — diferindo em Operating Temperature Range, Manufacturer, Configuration, Package, RoHS Status.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
SI1553CDL-T1-GE3
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
SI1553DL-T1-E3
✅ Drop-In✓ Em estoque
$0.22 / unidade
Ver ficha técnica →SI1553DL-T1
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
SI1553DL-T1-GE3 Classificações máximas e características elétricas
| Manufacturer | Vishay Siliconix |
| Part Number | SI1553DL-T1-GE3 |
| Transistor Polarity | Complementary N and P Channel |
| Number of Channels | 2 (1 N-channel + 1 P-channel) |
| Drain-Source Voltage VDS (max) | 20 V |
| Continuous Drain Current ID - N-Channel | 700 mA |
| Continuous Drain Current ID - P-Channel | 500 mA |
| On-Resistance RDS(on) - N-Channel | 0.32 ohm (typ at VGS = 4.5 V) |
| Gate-Source Threshold VGS(th) | 2.5 V (max) |
| Power Dissipation PD | 340 mW |
| Faixa de temperatura de operação | -55C to +150C (TJ) |
| Encapsulamento | SC-70-6 / SOT-363-6 |
| Tipo de montagem | Surface Mount |
| Process Technology | TrenchFET |
| Termination Finish | Lead-free (Pb-free), Halogen-free |
| RoHS Compliance | Compliant per Directive 2002/95/EC |
| Livre de halogênio | Yes (per IEC 61249-2-21) |
Configuração de pinos do SI1553DL-T1-GE3
| Pino 1 | S1 — Source 1 (N-channel) |
| Pino 2 | G1 — Gate 1 (N-channel) |
| Pino 3 | D2 — Drain 2 (P-channel) |
| Pino 4 | S2 — Source 2 (P-channel) |
| Pino 5 | D1 — Drain 1 (N-channel) |
| Pino 6 | G2 — Gate 2 (P-channel) |
Aplicações típicas
SI1553DL-T1-GE3 é adequado para 6 aplicaçãos: Portable Load Switching, Signal-Level Shifting, Complementary Push-Pull Driver, Analog Multiplexer Building Block, Wearable Health Monitor Sensor Switches, IoT Sensor Node Power Gating.
Portable Load Switching
The SI1553DL-T1-GE3's complementary N+P-channel integration in a 2.0 x 1.25 mm SC-70-6 package makes it ideal for portable load-switch circuits in smartphones, wearables, and handheld instruments. Its N-channel 700 mA rating handles high-side switching of downstream regulators, while the P-channel 500 mA provides low-side return-path control. With 0.32 ohm RDS(on) (N-ch) at VGS = 4.5 V, conduction loss stays under 50 mW at 200 mA load, preserving battery runtime. The 2.5 V VGS(th) enables direct GPIO drive from 1.8 V / 3.3 V MCUs without level translation. Place the part near the load with input/output capacitors to minimize parasitic inductance.
Recomendado
Signal-Level Shifting
The SI1553DL-T1-GE3 simplifies bidirectional level shifting between mismatched logic domains, e.g. 1.8 V to 3.3 V or 3.3 V to 5 V. The N-channel acts as the high-side pass device and the P-channel as the low-side return, forming a transmission gate that passes analog or digital signals in either direction. Its 20 V VDS provides ample headroom even for 5 V domains, and the 2.5 V VGS(th) ensures clean turn-off when gate is grounded. Designers should add series resistors on each side of the gate-source path to limit inrush current during domain transitions and to prevent shoot-through in the complementary pair.
Recomendado
Complementary Push-Pull Driver
In small DC fan, relay, or audio output stages, the SI1553DL-T1-GE3 provides matched complementary drive with N-channel pull-down and P-channel pull-up in a single 6-pin package. The matched VGS(th) of both devices minimizes shoot-through current and crossover distortion, critical for audio or motor applications. With 700 mA peak N-channel drive, the part handles small brushless fans up to 200 mA continuous without thermal issues when mounted on 1 square inch of copper. Decoupling the gate drive with 100 ohm series resistors slows edges to about 50 ns, reducing EMI while keeping switching loss minimal.
Recomendado
Analog Multiplexer Building Block
Two SI1553DL-T1-GE3 parts can form a 4-channel single-pole double-throw (SPDT) analog switch for low-frequency signal routing in test equipment, data acquisition front-ends, or audio mixers. The complementary pair provides bidirectional conduction paths, and the 20 V signal range covers most analog signal swings. The 0.32 ohm RDS(on) of the N-channel keeps on-state signal attenuation minimal, while the P-channel provides the symmetric return path. Designers should account for charge injection at the gate and add a small hold capacitor at the output for sample-and-hold applications.
Recomendado
Wearable Health Monitor Sensor Switches
The SI1553DL-T1-GE3's 2.0 x 1.25 mm SC-70-6 footprint and 0.32 ohm RDS(on) suit wearable health monitors where board area is at a premium. The N-channel can power-gate a heart-rate sensor or temperature sensor between measurements, while the P-channel provides the complementary return. The 20 V VDS rating is far above the typical 3.7 V Li-ion cell voltage, providing robust transient margin. Halogen-free / lead-free finish (per IEC 61249-2-21) is required for medical and consumer-wearable compliance with RoHS and REACH regulations.
Recomendado
IoT Sensor Node Power Gating
For battery-powered IoT sensor nodes (Zigbee, BLE, LoRa), the SI1553DL-T1-GE3 provides ultra-low quiescent current power gating of sub-systems like sensors, RF transceivers, or auxiliary MCUs. The 2.5 V VGS(th) ensures the MOSFETs are fully off when the gate is grounded, with sub-microamp leakage. The complementary pair can power-gate a sensor on the high side while providing a return-path disconnect on the low side, achieving true shutdown isolation. Pairing it with an MCU GPIO enables duty-cycled sensor activation, extending coin-cell battery life by an order of magnitude.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para SI1553DL-T1-GE3 — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | SI1553CDL-T1-GE3 | SI1553DL-T1-E3 | SI1553DL-T1 |
|---|---|---|---|---|
| Package | SC-70-6 (SOT-363) | SC-70-6 (SOT-363) - same | SC-70-6 (SOT-363) - same | SC-70-6 (SOT-363) - same |
| Brand | Vishay Siliconix | Vishay Siliconix - same | Vishay Siliconix - same | Vishay Siliconix - same |
| VDS (max) | 20 V | 20 V | 20 V | 20 V |
| N-Channel ID (continuous) | 700 mA | 700 mA | 700 mA | 700 mA |
| P-Channel ID (continuous) | 500 mA | 500 mA | 500 mA | 500 mA |
| N-Channel RDS(on) | 0.32 ohm (typ at VGS = 4.5 V) | 0.32 ohm (improved in C-revision) | 0.32 ohm | 0.32 ohm |
| VGS(th) (max) | 2.5 V | 2.5 V | 2.5 V | 2.5 V |
| Power Dissipation | 340 mW | 340 mW | 340 mW | 340 mW |
| Termination Finish | Pb-free + Halogen-free (GE3) | Pb-free + Halogen-free (GE3) | Pb-free only, NOT halogen-free | SnPb (tin-lead), NOT RoHS |
| RoHS Compliance | Compliant | Compliant | Compliant | Non-compliant |
Principais diferenciais
- Single-package complementary pair (vs Two discrete MOSFETs (e.g., 2N7002 + BSS84))
- Lead-free and halogen-free termination (vs SI1553DL-T1-E3 (Pb-free only))
- Higher N-channel current than typical SOT-363 parts (vs SI1555DL-T1-E3 (8V/lower-current family))
Notas de projeto
Estimated: at 700 mA continuous drain current with RDS(on) of 0.32 ohm (N-channel), conduction loss is approximately 0.16 W. With a SC-70 theta_JA of approximately 500 C/W on a 1 square inch copper pour, junction temperature rise is about 80 C above ambient. For sustained high-current switching (e.g., PWM-driven at >50% duty), increase copper area or use thermal vias to maintain TJ below 150 C. Source: Vishay datasheet 71078 and general SC-70 thermal guidelines.
Route the gate traces with 50 ohm controlled impedance if switching edges below 20 ns are required. Place a 100 ohm series gate resistor close to each gate pin to dampen parasitic ringing. Keep the source-return path of each MOSFET short - source inductance creates a feedback loop that can cause spurious oscillation during fast switching. The SC-70-6 footprint requires a small land pattern (see IPC-7351 SC-70 standard).
Do not exceed VGS absolute maximum of 8 V (verify against latest datasheet revision) - over-voltage on the gate oxide permanently damages the MOSFET. The 2.5 V VGS(th) means the MOSFET is not fully enhanced at 1.8 V GPIO drive; ensure VGS >= 4.5 V for lowest RDS(on). Avoid using both channels simultaneously in a non-complementary configuration without checking SOA - the shared substrate can cause thermal cross-coupling between channels.
Informações de conformidade
Lead-free and halogen-free per Vishay datasheet 71078 (IEC 61249-2-21). RoHS compliant per 2002/95/EC. AEC-Q100 automotive qualification status not stated in available data - assume not qualified unless verified against latest Vishay reliability report.
