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KSZ8001L - 10/100BASE-TX/FX PHY Transceiver, 48-LQFP | Microchip (Tape & Reel)
The Microchip Technology KSZ8001L is a single-port 10/100BASE-TX/FX Physical Layer Transceiver (PHY) supporting both 1.8V core and 3.3V analog supply rails in a 48-pin LQFP package. It implements the physical layer functions for 100BASE-TX (IEEE 802.3u) and 10BASE-T Ethernet, with auto-negotiation, HP Auto-MDIX crossover, and MII/RMII/SMII MAC-side interfaces. It also supports 100BASE-FX fiber mode via the on-chip PECL serializer. A Physical Layer Transceiver (PHY) is a layer-1 device in the OSI networking model that converts digital MAC-side data into analog line signals over copper (BASE-TX) or fiber (BASE-FX) media. PHYs sit between the Ethernet MAC controller (in an ASIC, FPGA, MCU, or SoC) and the physical medium, handling encoding (MLT-3 / 4B5B for 100 Mbps, Manchester for 10 Mbps), clock recovery, link training, and signal integrity. The KSZ8001L family is widely deployed in industrial embedded networking, factory automation, IP cameras, and any MCU/FPGA design that requires a low-power, low-pin-count Ethernet physical interface. Key features include 3.3V analog and 1.8V digital dual-supply operation, integrated baseline wander correction, auto-negotiation for 10/100 speed and full/half-duplex, automatic polarity correction, an MII/RMII/SMII MAC interface for low-pin MCU connections, on-chip termination resistors, and HP Auto-MDIX that eliminates the need for manual crossover cable selection. The 48-pin LQFP package supports industrial -40C to +85C operating temperatures. The KSZ8001L uses a mixed-signal CMOS architecture with DSP-based adaptive equalization, MLT-3 line driver, and a 125 MHz PLL for 100BASE-TX transmit clock synthesis. Its power-down and energy-detect modes let designs cut quiescent draw when the link is idle, important for industrial sensors and PoE endpoints. It is footprint-compatible with the KSZ8001S in 48-SSOP. Typical applications include industrial Ethernet nodes on STM32/MPU SoCs, IP set-top boxes, networked printers, IP cameras and DVRs, industrial control PLCs, and any embedded system requiring a compact 10/100 Ethernet physical interface via MII or RMII. For fiber runs (cameras, building backbone), the 100BASE-FX mode provides noise-immune connectivity over kilometers of multimode fiber. When designing with the KSZ8001L, ensure the 25 MHz reference oscillator or crystal is within +/-50 ppm and that the center-tap magnetic module (1:1 or 2:1 turns ratio) is properly isolated from switching supplies. The 1.8V digital rail should be decoupled with 0.1uF + 10uF ceramic capacitance to suppress PLL phase jitter. Enable HP Auto-MDIX by default for true plug-and-play cabling. This page synthesizes Microchip datasheet specifications, cross-reference alternatives, and PCB layout guidance not all available on any single distributor page - giving engineers a one-stop decision source for KSZ8001L-based designs.
KSZ8001LTR - 10/100BASE-TX/FX PHY Transceiver, 48-LQFP | Microchip
The Microchip Technology KSZ8001LTR is a single-port 10/100BASE-TX/FX Physical Layer Transceiver (PHY) supporting both 1.8V core and 3.3V analog supply rails in a 48-pin LQFP package. It implements the physical layer functions for 100BASE-TX (IEEE 802.3u) and 10BASE-T Ethernet, with auto-negotiation, HP Auto-MDIX crossover, and MII/RMII/SMII MAC-side interfaces. It also supports 100BASE-FX fiber mode via the on-chip PECL serializer. A Physical Layer Transceiver (PHY) is a layer-1 device in the OSI networking model that converts digital MAC-side data into analog line signals over copper (BASE-TX) or fiber (BASE-FX) media. PHYs sit between the Ethernet MAC controller (in an ASIC, FPGA, MCU, or SoC) and the physical medium, handling encoding (MLT-3 / 4B5B for 100 Mbps, Manchester for 10 Mbps), clock recovery, link training, and signal integrity. The KSZ8001L family is widely deployed in industrial embedded networking, factory automation, IP cameras, and any MCU/FPGA design that requires a low-power, low-pin-count Ethernet physical interface. Key features include 3.3V analog and 1.8V digital dual-supply operation, integrated baseline wander correction, auto-negotiation for 10/100 speed and full/half-duplex, automatic polarity correction, an MII/RMII/SMII MAC interface for low-pin MCU connections, on-chip termination resistors, and HP Auto-MDIX that eliminates the need for manual crossover cable selection. The 48-pin LQFP package supports industrial -40C to +85C operating temperatures. The KSZ8001L uses a mixed-signal CMOS architecture with DSP-based adaptive equalization, MLT-3 line driver, and a 125 MHz PLL for 100BASE-TX transmit clock synthesis. Its power-down and energy-detect modes let designs cut quiescent draw when the link is idle, important for industrial sensors and PoE endpoints. It is footprint-compatible with the KSZ8001S in 48-SSOP. Typical applications include industrial Ethernet nodes on STM32/MPU SoCs, IP set-top boxes, networked printers, IP cameras and DVRs, industrial control PLCs, and any embedded system requiring a compact 10/100 Ethernet physical interface via MII or RMII. For fiber runs (cameras, building backbone), the 100BASE-FX mode provides noise-immune connectivity over kilometers of multimode fiber. When designing with the KSZ8001LTR, ensure the 25 MHz reference oscillator or crystal is within +/-50 ppm and that the center-tap magnetic module (1:1 or 2:1 turns ratio) is properly isolated from switching supplies. The 1.8V digital rail should be decoupled with 0.1uF + 10uF ceramic capacitance to suppress PLL phase jitter. Enable HP Auto-MDIX by default for true plug-and-play cabling. This page synthesizes Microchip datasheet specifications, cross-reference alternatives, and PCB layout guidance not all available on any single distributor page - giving engineers a one-stop decision source for KSZ8001L-based designs.
KSZ8041NL-AM - 10/100 Ethernet PHY, MII/RMII | Microchip
The Microchip Technology KSZ8041NL-AM is a single-supply 10BASE-T/100BASE-TX Ethernet physical layer transceiver (PHY) with MII and RMII media independent interfaces, HP Auto MDI/MDI-X support, and a 32-pin QFN (5x5 mm) package. An Ethernet PHY is the analog/digital interface IC that sits between a MAC (media access controller) in a processor, MCU, or FPGA and the twisted-pair physical cable. In the network stack hierarchy, the PHY occupies the physical layer (Layer 1) beneath the data link layer, performing line coding (4B/5B for 100BASE-TX, Manchester for 10BASE-T), scrambling, equalization, echo cancellation, and clock and data recovery, while also handling auto-negotiation per the IEEE 802.3 standard. Key features of the KSZ8041NL-AM include its single 3.3 V supply operation, which simplifies power tree design in cost-sensitive systems, and its unique mixed-signal design that extends signaling distance while reducing power consumption. The part supports both the parallel MII (16-pin media independent interface) and the reduced pin-count RMII interface, giving designers flexibility when mating to MCUs and embedded processors. HP Auto MDI/MDI-X eliminates crossover cable concerns by automatically selecting transmit/receive pair polarity. Architecturally, the KSZ8041 integrates the 100BASE-TX transmit shaping filter and receive adaptive equalizer and baseline wander correction, minimizing external component count. It requires only standard Ethernet magnetics (a transformer module) plus a 25 MHz crystal reference; note that in RMII mode the KSZ8041NL requires an external 50 MHz clock source per the family hardware design checklist. Typical applications include industrial automation and PLC networking, embedded systems and single-board computers, IP security cameras and networked sensors, set-top boxes and printers, and any MCU/FPGA design requiring a 10/100 Mbps wired Ethernet port. Design consideration: when operating in Auto MDIX mode, Microchip's KSZ8041NL hardware design checklist requires an Auto MDIX-style magnetics module (symmetrical TX/RX channels), and the exposed pad of the QFN must be well-grounded for thermal and EMI performance. This page adds value beyond the datasheet by synthesizing drop-in family alternatives, FAQ coverage of selection and replacement questions, and practical design notes drawn from the manufacturer's errata and hardware design checklist documents.
KSZ8061RNBI - 10/100 Ethernet PHY Transceiver | Microchip
The Microchip Technology KSZ8061RNBI is a single-chip 10Base-T/100Base-TX Ethernet physical layer transceiver (PHY) in a 32-pin QFN (5x5 mm) package designed for data transmission and reception over unshielded twisted pair (UTP) cable. It supports both MII and RMII interfaces for MAC-side connectivity and integrates baseline wander correction plus Quiet-WIRE internal filtering to reduce line emissions for 100Base-TX operation. Operating from a single 3.3V supply, the KSZ8061RNBI delivers industry-standard HP Auto-MDIX for automatic crossover on the differential pairs. An Ethernet physical layer transceiver (PHY) is the lowest layer of the OSI networking model, converting digital MAC-side data into analog signaling across twisted-pair copper media. The PHY implements the IEEE 802.3 physical coding sublayer (PCS), physical medium attachment (PMA), and physical medium dependent (PMD) functions. Within the broader IC taxonomy, the KSZ8061RNBI is a PHY transceiver, a subcategory of Ethernet IC within Communication & Networking ICs, sitting beneath the MAC layer and above the transformer/MDI connector. Key features of the KSZ8061RNBI include HP Auto-MDIX automatic polarity correction, energy-detect power-down modes for system-level power savings, a 25 MHz reference clock input option, and a comprehensive per-pin strap configuration set (PHYAD, ANEN, SNI, etc.) for board-level address and mode selection. The Quiet-WIRE feature set lowers radiated emissions by internal filtering, simplifying automotive and industrial EMI compliance design. Architecturally, the KSZ8061RNBI uses a 3.3V analog core with an internal 1.2V digital LDO plus a DSP-based DSP-PHY receiver for 100Base-TX decoding. Its HP Auto-MDIX logic auto-detects and swaps TX/RX pairs when straight-through or crossover cables are used, eliminating the need for manual crossover and dual RJ45 jacks in most designs. Typical applications include industrial Ethernet nodes, automotive infotainment and gateway ECUs, factory automation controllers, IP security cameras, building automation gateways, and any embedded MCU/MPU board needing a 10/100 Ethernet drop with a small PCB footprint. Its automotive-grade pedigree and Quiet-WIRE filtering make it a frequent choice for CAN-to-Ethernet bridges and telematics control units. One key design consideration is providing a 25 MHz reference clock with appropriate jitter performance, along with a center-tap 1:1 or 2:1 isolation transformer matched to the PHY's analog drive levels. PCB layout must keep the MII/RMII trace lengths matched and the analog supply decoupled with a 10 µF bulk plus 0.1 µF/0.01 µF ceramics close to the AVDD pins. This page synthesizes distributor stock, drop-in alternatives, and design notes not found in the manufacturer datasheet alone. Engineers evaluating the KSZ8061RNBI for a new design will find a compact reference for compliance, replacement options, and PCB integration.
KSZ8382L - Single-Chip VoIP Phone Solution 176-LQFP | Microchip
The Microchip Technology KSZ8382L is a single-chip VoIP phone solution integrating a wide/narrow-band codec, network interface, and host controller functions into a 176-pin LQFP package. Designed as a complete system-on-chip for IP telephone endpoints, it combines audio conversion, packet processing, and Ethernet connectivity into one device, reducing the bill of materials for VoIP equipment designers. A VoIP phone controller is a specialized Application-Specific Standard Product (ASSP) that handles the digital signal processing, network packetization, and audio codec functions required to convert voice into IP packets and back. It sits within the broader hierarchy of network controllers and telecom interface ICs, occupying the application-specific node between general-purpose Ethernet controllers and full-scale VoIP processors. By integrating the host CPU subsystem, the wide/narrow-band audio codec, and the network media access control, the KSZ8382L allows designers to build a complete two-port IP phone with minimal external components. Key features of the KSZ8382L include integrated wide-band (16 kHz) and narrow-band (8 kHz) audio codec support, hardware acceleration for voice codecs such as G.711, G.723.1, G.729A/B, and built-in echo cancellation. The device includes a 10/100 Ethernet MAC plus PHY, two VoIP channel interfaces, and integrated SLIC/SLAC interface logic. Additional features include on-chip memory management, host-side interfaces (parallel/serial), and support for QoS-aware packet handling. Architecturally, the KSZ8382L pairs an embedded processor core with the audio DSP block and a separate Ethernet MAC/PHY engine. This partitioning lets firmware offload the time-critical codec and packetization tasks while leaving higher-layer call control to the host CPU. According to the Microchip product literature, the part is targeted specifically at desktop and entry-level IP phone implementations, where integration translates directly to cost and PCB-area savings. Typical applications include desktop IP phones, IP-PBX station endpoints, networked audio intercoms, soft-phone hardware bridges, and embedded VoIP appliances. The 176-LQFP package provides sufficient I/O for two independent voice channels plus Ethernet, making it suitable for low-to-mid density office telephony equipment. When designing with the KSZ8382L, engineers should pay close attention to power-supply decoupling near the codec analog pins to preserve audio dynamic range, and ensure the LAN reference clock layout follows the Ethernet PHY guidelines in the datasheet to keep jitter within the 10/100 PHY tolerance. This page synthesizes distributor pricing, reference design notes, and drop-in compatible parts sourced from web data that go beyond the manufacturer datasheet summary, helping procurement and design engineers evaluate the KSZ8382L in context.
KSZ9021GN - 1000Mbps Gigabit Ethernet Transceiver | Microchip
The Microchip Technology KSZ9021GN is a full-duplex Gigabit Ethernet transceiver with a 1000 Mbps data rate, GMII/MII interface support, and a 64-pin QFN package measuring 8 mm by 8 mm. It operates from a 3.3 V supply and is specified for a 0°C to +70°C temperature range. The device supports the eight-wire Ethernet transceiver role needed to connect an Ethernet PHY implementation to a network transformer or other physical medium interface. A Gigabit Ethernet transceiver is an interface IC that integrates transmit and receive functions for high-speed Ethernet equipment. Within the network hierarchy, it connects a digital MAC or processor interface to the physical Ethernet layer. GMII provides a parallel high-speed digital interface, while MII supports lower-speed legacy Ethernet operation. The KSZ9021GN combines these functions in a surface-mount QFN package intended for compact industrial and communications equipment. According to the supplied search data, the KSZ9021GN conforms to the auto-negotiation protocol defined in Clause 28 of the IEEE 802.3 Specification. Auto-negotiation allows unshielded twisted-pair link partners to select their highest common operating mode. The available specifications also identify GMII and MII interface types, a 1 Gbps data rate, 3.3 V supply operation, and a 0°C to +70°C ambient temperature range. The manufacturer lists the part in a lead-free 64-pin QFN package. The transceiver is suitable for network switches, routers, industrial Ethernet controllers, embedded gateways, and test equipment requiring a conventional parallel Ethernet interface. Its 3.3 V supply requirement should be coordinated with the system power rails and the digital interface voltage levels. Because the supplied data does not provide complete electrical limits, pin-level descriptions, package dimensions beyond the 8 mm by 8 mm indication, or detailed timing figures, those values must be confirmed against the Microchip datasheet before layout or production use. For PCB implementation, preserve the manufacturer's recommended QFN land pattern, thermal-pad connection, high-speed trace routing, and decoupling arrangement. The exposed-pad and ground-return strategy is particularly important in a gigabit interface because return-path discontinuities can degrade signal integrity. Keep the Ethernet differential pairs away from noisy switching nodes and provide a controlled reference plane beneath the transceiver and associated magnetics. This page combines the verified distributor and manufacturer references with practical selection and integration guidance. Pricing, alternate cross-reference data, and application-specific companion parts are included only where the supplied sources support them; unverified engineering details are explicitly identified for follow-up rather than guessed.
KSZ9893RNXC-TR - 3-Port Gigabit Ethernet Switch, 64-VQFN | Microchip
The Microchip Technology KSZ9893RNXC-TR is a fully integrated layer-2 managed three-port Gigabit Ethernet switch in a 64-pin VQFN (8x8 mm) package, supporting 10/100/1000 Mbps on two PHY ports and a third configurable RGMII/MII/RMII interface port. The device integrates two 10/100/1000 Base-T PHYs, a non-blocking store-and-forward switch fabric, and an internal frame buffer suitable for managed-switch applications with QoS and VLAN support. A managed Ethernet switch is a layer-2 networking IC responsible for connecting end devices on the same local area network. Within the broader taxonomy, microchip ISZ9893RNXC-TR falls under Ethernet switch IC -> network interface controller -> communication IC -> semiconductor. These switches typically sit on the same PCB as a host processor (via SPI/I2C/MII/RGMII), handling MAC-layer frame forwarding, address learning, queueing, and traffic classification while offloading these tasks from the application CPU. Key features include support for Energy Efficient Ethernet (EEE), Wake-on-LAN (WOL), Quality of Service (QoS), LinkMD cable diagnostics, and MIB counters for network telemetry. The KSZ9893RNXC-TR is configured via SPI or I2C management interfaces and supports IEEE 802.1Q VLAN, 802.1p priority, and 802.3x flow control. Two of the three ports are full PHY transceivers with HP Auto-MDI/MDIX, while the third port exposes RGMII/MII/RMII to an external MAC or SoC. Architecturally, the KSZ9893R family uses a 1.2 GHz SerDes core for the integrated PHYs, with on-chip termination and adaptive equalization for 1000BASE-T operation over CAT5e cable. The store-and-forward fabric supports 12K-entry address lookup and 4 priority queues per output port. Per-port egress shapers and rate limiting use leaky-bucket algorithms, and the device integrates PTP hardware timestamping for IEEE 1588 applications when configured with external 25 MHz reference. Typical applications include standalone 10/100/1000 Mbps Ethernet switches, VoIP infrastructure switches, Wi-Fi access-point gateways, industrial control switches, broadband gateways, networked measurement and control systems, and security/surveillance systems. The integrated PHY count reduces external magnetics and RJ-45 count, simplifying the BOM for 2+1 + fan managed Gigabit designs. Designers should ensure the 25 MHz reference clock source is within ±50 ppm to meet 1000BASE-T jitter requirements, and follow Microchip reference schematics for the central-tap magnetics and 49.9 ohm termination. The device requires 1.2 V and 3.3 V supplies; both rails should be decoupled with 10 uF + 0.1 uF capacitors near the package. This page synthesizes distributor pricing for the KSZ9893RNXC-TR, drop-in package-compatible variants, and practical design notes not aggregated on any single distributor page, giving engineers a one-stop reference for selecting and laying out this Ethernet switch IC.
LAN8720A-CP-TR - RMII 10/100 Ethernet PHY Transceiver | Microchip
The Microchip Technology LAN8720A-CP-TR is a small-footprint, low-power 10BASE-T/100BASE-TX Ethernet PHY transceiver with an RMII interface to the MAC, housed in a 24-pin QFN (4x4 mm) package. It supports full-duplex 10/100 Mbps operation, HP Auto-MDIX for direct or crossover cable use, and auto-negotiation to select the optimal speed and duplex mode. The device operates from a single 3.3V supply with Microchip's flexPWR technology and provides 1.8V/2.5V/3.3V variable-voltage I/O for direct connection to common MAC ASICs. An Ethernet PHY (physical layer transceiver) is the analog front-end of an Ethernet link, sitting between the RJ-45 magnetics and the MAC controller. It handles line encoding/decoding, clock recovery, link training, and signal shaping so the digital MAC can exchange frames with the network. The LAN8720A belongs to the 10/100 Fast Ethernet PHY family, positioned below Gigabit PHYs in the network interface hierarchy and above purely digital MAC-only designs that require an external analog transceiver. Key features include an integrated 1.2V LDO regulator that can be sourced externally, very low power consumption (claimed up to 40% lower than prior Microchip PHYs), a hardware-strapped configuration for default operation, and commercial temperature grade (0 C to +85 C). The device also includes Energy-Efficient Ethernet (EEE) support and a SMI (Serial Management Interface) for PHY register access. Its 24-pin QFN footprint makes it the industry's smallest 10/100 Ethernet transceiver solution in this package size. Architecture-wise the LAN8720A integrates a 100BASE-TX DSP-based PHY core, ADC/DAC analog blocks, line driver, HP Auto-MDIX termination switches, and a digital control block with MII/RMII muxing. The flexPWR architecture allows the core to run from 1.2V while the I/O rails stay at 1.8V/2.5V/3.3V, eliminating level shifters when paired with most modern SoCs. Power-down and energy-detect modes further reduce quiescent draw for low-power designs. Typical applications include consumer broadband gateways, IP set-top boxes, IP phones, game consoles, industrial Ethernet nodes, and MCU-based designs such as ESP32 ethernet MAC add-on boards where the LAN8720A provides the analog PHY. It is also commonly seen in printers, networked embedded controllers, and small-office routers where space and BOM cost matter more than Gigabit throughput. When designing with this part, select the correct external reference clock (25 MHz) source and place the device close to the RJ-45 jack magnetics to minimize EMI. Verify that the MAC supports RMII (not just MII) and route the 50 MHz RMII reference clock with controlled impedance to avoid jitter. Leave sufficient ground flooding under the exposed pad for thermal dissipation. This page synthesizes distributor stock, drop-in alternatives, design notes and comparison data that go beyond the manufacturer datasheet, helping engineers shorten the LAN8720A-CP-TR selection and validation cycle.
LAN9313-NU - 3-Port 10/100 Ethernet Switch | Microchip
The Microchip LAN9313-NU is a fully integrated, three-port 10/100 managed Ethernet switch housed in a 128-pin VTQFP (14x14 mm) package, combining two 10/100 PHYs and a media access controller (MAC) with an MII host interface. It supports full- and half-duplex 10BASE-T and 100BASE-TX operation per IEEE 802.3 and complies with 802.1D/802.1Q bridge/switch management standards, enabling drop-in compatibility with industry-standard Ethernet and Fast Ethernet designs. A managed Ethernet switch is a network bridge IC that interconnects multiple Ethernet segments at Layer 2, learning MAC addresses, filtering frames, and forwarding traffic with minimal host-CPU intervention. Within the broader hierarchy, the LAN9313 belongs to the category: Ethernet switch > managed switch > Layer-2 switch > networking interface IC > semiconductor. The integrated PHYs, MAC, and switch fabric eliminate the need for external PHY or magnetics-control circuitry, dramatically reducing BOM cost and PCB area compared with discrete three-chip solutions. Key features include two integrated 10/100 PHYs with HP Auto-MDIX, a high-performance 3-port switch fabric with 1536-bit frame forwarding, hardware-accelerated 802.1Q VLAN tagging, 802.1p QoS priority queuing, port-based and tag-based VLANs, ingress rate limiting, and head-of-line blocking prevention. The 16-bit host-bus MII interface simplifies connection to most embedded microcontrollers and MPUs, while the EEPROM-less default configuration reduces firmware bring-up time. Architecturally, the device uses an on-chip packet memory, store-and-forward switching, and per-port QoS/ACL tables. Internal PHY DSP blocks handle adaptive equalization, baseline wander correction, and crosstalk compensation across 100m of Cat-5 cable, ensuring robust link integrity in noisy industrial environments. Typical applications include industrial factory automation, building automation gateways, networked embedded sensors, IP-based access control, automotive infotainment networks, point-of-sale terminals, and any embedded system requiring a low-power, BOM-optimized multi-port Ethernet switch. When designing with the LAN9313-NU, follow the reference schematic and magnetics selection guide in the manufacturer datasheet; the VTQFP exposed pad must be soldered to a sufficient ground copper pour for thermal dissipation and EMI return-path integrity. This page consolidates distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet, giving procurement and design engineers a single authoritative reference for the LAN9313-NU.
LAN9353/PT - 3-Port 10/100 Managed Ethernet Switch | Microchip
The Microchip Technology LAN9353/PT is a high-performance, small-footprint, full-featured 3-port 10/100 managed Ethernet switch in a 64-pin TQFP-EP (10x10 mm) package. It integrates three 10/100 PHYs, three MACs, and a management engine supporting dual RMII, MII, and Turbo MII host interfaces, designed for embedded applications where performance, flexibility, and ease of integration are required. The device supports full-duplex/half-duplex operation, 802.3x flow control, and 802.1Q VLAN tagging. An Ethernet switch is a Layer 2 networking device that connects multiple Ethernet segments, learning MAC addresses, forwarding frames based on destination lookup tables, and isolating collision domains. In embedded systems, an integrated multi-port switch like the LAN9353/PT replaces several discrete PHY/MAC pairs and an external switch ASIC, reducing BOM cost and PCB area. The LAN9353 family occupies the role of "managed switch IC" within the broader hierarchy: Ethernet switch -> network IC -> interface IC -> wired communication -> semiconductor. The "managed" designation means the switch supports configurable per-port features (VLAN, QoS, port mirroring) via SPI, I2C, or SMI management interfaces. Key features include three integrated 10/100 PHYs with HP Auto-MDIX, support for both 10BASE-T and 100BASE-TX on each port, dual-port RMII or single MII/RMII/Turbo MII host interfaces, an integrated 1.5KB frame buffer, IEEE 802.1Q VLAN support with 16 VLAN groups, QoS with four priority queues per port, and programmable per-port LEDs. The device operates from a single 3.3V supply with integrated 1.2V LDO for core logic and supports industrial temperature grades via the LAN9353i variant. The LAN9353/PT uses a cut-through or store-and-forward switching architecture with a 1.5KB shared packet buffer, supporting wire-speed non-blocking switching on all three ports. The integrated PHYs include baseline wander correction, adaptive equalization, and crosstalk cancellation for robust operation over CAT5 cable. The host interface flexibility (dual RMII + MII/Turbo MII) allows direct connection to microcontrollers, microprocessors, or application processors without an external MAC. Typical applications include industrial Ethernet daisy-chains, building automation gateways, networked HVAC controllers, automotive infotainment rear-seat entertainment hubs, and embedded Linux platforms using processors that lack a built-in Ethernet switch. The compact TQFP-EP package enables use in space-constrained industrial and consumer products. When designing with the LAN9353/PT, provide proper 50-ohm controlled-impedance routing for all differential Ethernet pairs, place the 25 MHz crystal or oscillator within 1 cm of the XI pin, and follow Microchip reference schematic and layout guidelines for RJ-45 magnetics integration. Industrial variants (LAN9353I/PT) extend the operating range to -40C to +85C. This page synthesizes Microchip datasheet specs, current distributor pricing as of 2026-10-22, drop-in same-package alternatives, and practical design notes for engineers selecting a 3-port managed Ethernet switch.
LARA-R202-02B - LTE Cat 1 Multi-Mode Cellular Module | u-blox
The u-blox LARA-R202-02B is a multi-mode LTE Cat 1 / 3G / 2G cellular transceiver module that delivers up to four LTE bands, two UMTS/HSPA bands, and two GSM/EGPRS bands in a compact 24x26 mm LGA castellation surface-mount package. As an AT&T and T-Mobile carrier-certified module, it supports LTE bands B2, B4, B5, and B12 plus 3G fallback on B2/B5, making it ideal for North American M2M, asset tracking, and IoT deployments. The antenna is not included on the module, giving designers freedom to choose a tuned trace, ceramic, or external antenna for their mechanical enclosure. A cellular module (also called a radio module, transceiver module, or modem) is a self-contained subsystem that integrates the cellular baseband, RF transceiver, power management, and SIM interface on a single PCB. Cellular modules sit at the top of the embedded connectivity hierarchy, abstracting cellular protocol complexity from the host MCU. Within the u-blox LARA family, the R2 series is the size-optimized LTE Cat 1 multi-mode line, positioned between the lower-cost SARA Cat 1 modules and the higher-bandwidth TOBY LTE Cat 6 modules. Key features include integrated TCP/IP, HTTP, FTP, TLS, and MQTT stacks via the u-blox AT command set, support for GNSS operation in parallel through dedicated host-controlled interfaces, and a USB 2.0 interface for high-throughput diagnostics and firmware updates. The module operates over the industrial -40C to +85C temperature range, supports 3.3V to 4.4V supply input, and exposes UART, SPI, I2C, and USB host interfaces for host MCU integration. The LARA-R2 architecture pairs a Qualcomm MDM6200/MDM9x07-class baseband with a u-blox-tuned RF front end. Internal signal pull-ups added during the -02B revision (documented in u-blox PCN UBX-17062827) eliminate rare low-temperature diagnostic glitches. The LARA form factor shares pinout compatibility with SARA and TOBY modules, allowing PCB reuse across product families. Typical applications include fleet and asset tracking, point-of-sale terminals, connected health devices, smart metering, industrial telemetry, and alarm/security panels. The AT&T and T-Mobile certifications make drop-in network approval straightforward for North American IoT product launches. The module is also widely adopted for connected vending, EV charging station telemetry, and remote sensor gateways. Designers should size the host PCB clear-out keep-out area below the antenna feed, ensure the SIM card holder is within 10 cm of the SIM pins, and add a TVS diode array on the USB lines for surge protection. For regulatory compliance, the end device must undergo FCC/PTCRB certification with the chosen antenna, even if the module itself is pre-certified. This page synthesizes verified distributor pricing, same-family cross-brand drop-in alternatives, and practical design notes compiled by XAIPART that go beyond what appears in the standalone u-blox datasheet. Sources include DigiKey, Mouser, LCSC, and the official u-blox system integration manual.
LARA-R202-03B - LTE Cat 1 / HSPA+ Cellular Module | u-blox
The u-blox LARA-R202-03B is a size-optimized LTE Cat 1 / 3G / 2G multi-mode cellular transceiver module in an LGA-100 castellation surface-mount package, designed for North American US-Cellular and T-Mobile networks. It supports four LTE bands (B2, B4, B5, B12), two UMTS/HSPA+ bands (B2, B5), and two GSM/EGPRS bands with peak downlink data rates up to 10.3 Mbps. The module operates from a 3.8 V nominal supply and integrates the cellular baseband, RF transceiver, and power management in a compact 26.0 x 24.0 mm form factor. An LTE Cat 1 cellular module is a 4G LTE category-1 device class that delivers up to 10 Mbps downlink / 5 Mbps uplink over LTE, balancing throughput and power for IoT applications that exceed Cat-M1 or NB-IoT bandwidth but do not need full broadband speeds. Cellular modules sit in the connectivity hierarchy between simple short-range radios (Wi-Fi, Bluetooth) and full smartphone-class LTE modems, and they belong to the broader category of RF transceiver modules that combine RF front-end, baseband processor, and protocol stack into a single pre-certified surface-mount unit. The LARA-R2 family specifically targets industrial IoT, telemetry, and asset-tracking products requiring reliable wide-area connectivity. Key features include multi-band LTE/HSPA+/GSM support, integrated TCP/IP and UDP/IP stacks, USB 2.0 device interface, UART, and AT-command control via u-blox's well-documented AT interface. The castellation LGA-100 footprint enables standard reflow soldering, while the surface-mount design simplifies manufacturing compared to older module generations that required castellated through-hole assembly. The module is designed for industrial temperature ranges and is pre-certified by major North American carriers, eliminating the need for operator-specific PTCRB/GCF certification when properly integrated into an end device. Typical applications include asset tracking and fleet management, smart metering, vending machine telemetry, industrial sensor gateways, and connected health devices. The LARA-R202-03B specifically targets US-Cellular and T-Mobile LTE coverage, making it well-suited for North American IoT deployments where those carriers' LTE Band 12 700 MHz spectrum is critical for indoor and rural penetration. When designing with this module, ensure antenna selection matches the supported frequency bands, and provide adequate thermal relief since the LGA package dissipates heat through the PCB land pattern. The u-blox EVK-R2 evaluation kit accelerates integration, and developers can use u-blox's m-center cellular evaluation software for AT-command testing. This page synthesizes real-time distributor pricing, LARA-R2 family alternatives, and practical design notes not consolidated in the manufacturer datasheet alone.
LBAA0QB1SJ-296 - LoRaWAN Sub-GHz Module 868/915MHz | Murata
The Murata Electronics LBAA0QB1SJ-296 (Type 1SJ) is a compact LoRaWAN transceiver module operating in the 868 MHz and 915 MHz sub-GHz ISM bands from a 2 V to 3.6 V supply, delivering up to 21.5 dBm output power and -137 dBm receiver sensitivity in a surface-mount package. A LoRaWAN module is a complete long-range, low-power wireless radio subsystem that integrates a sub-GHz RF transceiver, antenna matching network, and modem firmware on a single certified land-pattern device. Within the LPWA (Low Power Wide Area) connectivity hierarchy, it sits above bare RF chips and below complete end-node systems, letting engineers add km-range telemetry to sensors, meters, and trackers without designing an RF section or navigating radio-equipment certification from scratch. Key features include one of the smallest footprints in the industry for a LoRaWAN module, lower power consumption and higher RF output than previous Murata generations, radio law certification already obtained for major regions, and preloaded modem software for the US915 band that is controlled entirely through simple AT commands. Receiver current is typically 15.5 mA to 20 mA, making the module suitable for coin-cell and battery-powered nodes. At its core the module is built on the Semtech SX1262 LoRa chipset, which provides the LoRa spread-spectrum modulation, high link budget, and up to +21.5 dBm transmit power. Murata integrates the RF front end, crystal reference, and matching network, then validates the design against regional radio regulations so customers inherit a certified RF chain. Typical applications include smart utility metering on US915 LoRaWAN networks, battery-powered asset tracking, smart agriculture sensor nodes, and industrial IoT gateways-to-node links where multi-kilometer range and multi-year battery life are required. For design success, allocate a ground plane under the module, follow the Murata recommended land pattern, and account for the 2 V to 3.6 V supply window - a regulated 3.3 V rail is the natural choice. Antenna is not included on the -296 variant, so plan RF feed and antenna matching on the host PCB. This page synthesizes distributor pricing, firmware-variant comparison (-295 vs -296), and practical design notes not found in the manufacturer datasheet.
LBAD0XX1SC-NTN - LTE Cat M1/NB-IoT NTN Module | Murata
The Murata LBAD0XX1SC-NTN (Type 1SC-NTN) is a Cat M1/NB-IoT LPWA cellular module with integrated Rel-17 Non-Terrestrial Network (NTN) satellite communication support, GNSS positioning, and integrated SIM, housed in an 11.1 x 11.4 x 1.5 mm silver resin-shielded surface-mount package. An LPWA (Low Power Wide Area) cellular module is a wireless communication subsystem that connects IoT devices to LTE Category M1 (LTE-M) and NB-IoT networks optimized for low data rates, deep coverage, and multi-year battery life. Within the system hierarchy, an LPWA module sits between the host MCU and the cellular antenna, handling RF transceiving, protocol stack execution, and network registration so the host processor only sees an AT command or OpenMCU interface. Key features of the Type 1SC-NTN include the world's smallest Cat. M1/NB-IoT footprint with global certification, seamless Rel-17 NTN satellite connectivity via Skylo technology that requires no hardware design changes, support for GPS/GNSS positioning, an Integrated SIM (iSIM) option, and Murata's OpenMCU capability that lets the module host application code directly. The module operates in the LTE low band (699 MHz to 915 MHz) and mid band (1.71 GHz to 2.025 GHz) and is optimized for 3GPP class 3 output power of +23 dBm. Architecturally, the module comprises an Altair ALT1250 transceiver paired with an FEM (front-end module) and external flash memory, all integrated behind Murata's silver resin shield. This single-package integration minimizes external BOM count, simplifies RF layout, and reduces time-to-market for IoT device makers. Regulatory certifications include FCC/IC, ETSI, and TELEC, plus PTCRB and GCF operator certifications, enabling worldwide deployment on a single design. Typical applications include asset tracking that roams beyond terrestrial coverage, smart utility metering, agricultural and maritime sensors, and fleet telematics where uninterrupted communication - anytime, anywhere - is a requirement. The NTN capability is especially valuable where terrestrial LTE-M/NB-IoT coverage is unavailable or unreliable. When designing with this module, follow Murata's recommended land pattern exactly; datasheet guidance notes that characteristics can vary with land dimensions, NC-terminal grounding method, and PCB material and thickness. Antenna is not included, so plan an external antenna with a 50-ohm matched feed. This page synthesizes distributor availability data, NTN capability details, and practical design guidance not consolidated in the manufacturer datasheet, along with drop-in family alternatives and application pairing recommendations.
LBAD0XX1SC-SFS - LTE Cat M1/NB-IoT Module | Murata
The Murata LBAD0XX1SC-SFS (Type 1SC-SFS) is an LTE Cat M1 / NB-IoT cellular LPWA transceiver module with +23 dBm Class 3 LTE output power, integrated GNSS positioning support, and a compact 11.1 x 11.4 x 1.5 mm (max) silver resin shielded package with LGA-style surface-mount lands. An LPWA (Low Power Wide Area) module is a type of cellular connectivity subsystem that sits within the wireless module hierarchy: transceiver module -> cellular IoT module -> RF & wireless component. LPWA technologies such as LTE-M (Cat M1) and NB-IoT trade peak throughput for dramatically lower power consumption and superior deep-indoor penetration, making them the dominant connectivity choice for battery-powered IoT devices that must communicate over licensed cellular spectrum for 10 or more years on a single battery. Key features of the LBAD0XX1SC-SFS include dual-mode LTE Cat M1 and NB-IoT operation, a user-friendly AT command interface for seamless host integration, and ultra-low-power eDRX and PSM sleep modes that enable 10+ year battery life as stated by Murata. The module integrates the Altair ALT1250 transceiver together with a FEM (front-end module) and external flash memory, so the host board needs only an antenna and minimal external circuitry. On the technical side, the module uses an integrated TCXO (temperature-compensated crystal oscillator) with robust low-drift thermal characteristics, which removes the need for an external oscillator and preserves RF accuracy across the full industrial temperature range. RF coverage spans low and mid LTE bands (699 MHz to 915 MHz and 1.71 GHz to 2.025 GHz per DigiKey listings), and the module is optimized for 3GPP release-compliant Class 3 +23 dBm output power. Murata also highlights support for GPS/GNSS, OpenMCU, Integrated SIM, and NTN (non-terrestrial network) operation in the Type 1SC family. Typical applications include battery-powered smart utility meters, asset trackers, smart-city sensors, and industrial telemetry endpoints where multi-year battery life and global cellular certification (FCC/IC, ETSI, TELEC, PTCRB, GCF) shorten time to market. Design consideration: place the module antenna feed with a controlled 50-ohm trace and follow Murata's recommended land pattern exactly, since the shielded LGA construction relies on the PCB ground plane for RF and thermal performance. This page synthesizes verified manufacturer and distributor data, pricing structure, drop-in family variants, and practical design notes not found in the datasheet alone. Pricing shown reflects availability as of 2026-10-19.
LBAD0XX1WG-EVK-TEMP - LTE Cat M1 Evaluation Kit | Murata
The Murata LBAD0XX1WG-EVK-TEMP is a temperature-qualified evaluation kit for the Type 1WG (LBAD0XX1WG) LTE Cat M1 cellular LPWA module, designed to accelerate development of battery-powered IoT devices that connect over LTE-M networks. The underlying module operates from a 2.85 V to 4.35 V supply, supports receive levels down to -23 dBm, and uses an external antenna configuration, all packaged in a compact LGA-format shielded construction. An LTE Cat M1 module is a cellular LPWA (Low Power Wide Area) modem that implements 3GPP LTE-M protocols, sitting within the broader hierarchy of cellular connectivity: cellular modem -> LTE LPWA module -> wireless connectivity module -> IoT communication device. LTE Cat M1 is optimized for machine-type traffic where ultra-low power, deep coverage, and 10+ year battery life matter more than throughput, distinguishing it from Cat NB1/NB-IoT (narrowband, reduced mobility) and standard LTE (high throughput, high power). Key features evidenced across the Type 1WG/1SC family include 3GPP eDRX and PSM power-saving modes, hibernation power of just 3 uA, eDRX power below 45 uA at 8 hyperframes, and a configurable dormant window in PSM mode. These modes collectively enable the quoted battery life of up to 10+ years for small battery-operated IoT devices. The module family also supports over-the-air (OTA) firmware update, eliminating field-recall costs during deployment. The Type 1SC sibling measures just 11.1 x 11.4 x 1.5 mm and integrates an Altair ALT1250 transceiver, FEM, external flash, and a low-drift integrated TCXO in a silver resin shielded package, indicating the integration density of this product line. Typical applications for this evaluation platform include smart utility meters, asset trackers, smart-city sensors, and industrial telemetry nodes - anywhere a small, battery-operated device must maintain multi-year cellular connectivity. Engineers use the EVK to validate RF performance, characterize current consumption across PSM/eDRX states, and prototype network registration and OTA update flows before committing to custom PCB layouts. When designing with the Type 1WG module, pay close attention to supply-voltage sequencing and current-profile headroom: even though average current is microamps, transmit bursts require the 2.85 V to 4.35 V supply rail to remain stable under pulsed load, so input capacitance and battery internal resistance must be characterized. This page synthesizes verified manufacturer product data, distributor listings, and practical evaluation guidance for the LBAD0XX1WG-EVK-TEMP that is not consolidated on the manufacturer datasheet alone.
LBAD0ZZ2GD-EVK - LTE-M/NB-IoT Cat.M1 Eval Kit | Murata
The Murata LBAD0ZZ2GD-EVK is an evaluation kit for the Type 2GD (LBAD0ZZ2GD) LTE Cat.M1/NB2 cellular IoT module, an ultra-small, ultra-low-power LPWA module that integrates the LTE SoC, RF front end, crystal, and SRAM and flash memory in a compact LGA package. The kit enables engineers to prototype, test, and certify 3GPP Rel-14 LTE-M and NB-IoT connectivity before committing to a custom PCB design. An LPWA (Low Power Wide Area) module is a type of cellular communication module belonging to the broader hierarchy of connectivity module -> RF module -> IoT communication device. LTE Cat.M1 (LTE-M) and NB-IoT are licensed-band 3GPP standards designed for battery-powered IoT devices that prioritize minimal cost and power consumption over throughput; LTE-M provides approximately 1 Mbps upstream and 1 Mbps downstream, and both standards support mobility, making them suitable for moving devices with reduced radio interference compared with unlicensed-band solutions. Key features of the underlying LBAD0ZZ2GD module include 3GPP Rel-14 compliance, dual-mode LTE-M/NB2 operation, 8 MByte of flash memory, and low-power modes including PSM (Power Saving Mode) and eDRX (extended Discontinuous Reception). Murata states its compact LPWA module family achieves power consumption as low as 1.5 uA in Power Saving Mode, which is a central reason for selecting this platform for battery-powered designs. The module uses an external antenna configuration and an LGA surface-mount land pattern per Murata standard recommendations. Technically, the Type 2GD integrates the complete signal chain on a single substrate: the LTE SoC handles baseband and protocol processing, the RF front end drives the external antenna, and integrated SRAM and flash eliminate external memory BOM items. Because the RF front end, crystal, and memory are pre-integrated and pre-tested, designers avoid the most difficult RF layout tasks and inherit Murata's certification baseline, with the module carrying FCC ID HSW-TY2GD via Murata Electronics North America. Typical applications evaluated with this kit include smart utility metering, asset tracking, smart city infrastructure, industrial sensors, and battery-powered telemetry nodes. The evaluation kit lets developers exercise PSM/eDRX duty cycles and measure real current profiles before finalizing the power budget. A key design consideration: Murata's datasheet notes that module characteristics vary depending on land pattern drawing method, grounding method, land dimensions, NC-terminal land forming, and PCB material and thickness, so the EVK-provided reference layout should be followed closely when transitioning to production. This page synthesizes distributor data, verified web sources, and practical integration guidance for the LBAD0ZZ2GD-EVK not consolidated in the manufacturer datasheet.
LBEE5HY1MW-230 - Wi-Fi 5 + BT 5.0 Module, Type 1MW | Murata
The Murata LBEE5HY1MW-230 is a Type 1MW surface-mount wireless combo module integrating Wi-Fi 802.11a/b/g/n/ac (Wi-Fi 5) dual-band 2.4 GHz/5 GHz connectivity with Bluetooth 5.0 BR/EDR/LE on a single shielded PCB, based on the Infineon CYW43455 chipset. Per the manufacturer datasheet, the module delivers up to 433 Mbps PHY on Wi-Fi and 3 Mbps PHY on Bluetooth, with an integrated dual-band RF chain, crystal, power-management circuitry, and shielding in a compact SMD footprint suitable for space-constrained IoT and embedded designs. A Wi-Fi + Bluetooth combo module is a pre-certified subsystem that bundles the radio transceiver, baseband processor, antenna matching network, and regulatory shielding into a single reflow-solderable component. The module sits between the host application processor (which runs the network stack and BT profiles) and the wireless air interface, offloading RF complexity, FCC/ETSI/TELEC certification burden, and BOM risk. The Murata Type 1MW family specifically targets low-power IoT endpoints that need modern dual-band Wi-Fi and Bluetooth 5.0 coexistence without discrete RF design effort. Key features of the LBEE5HY1MW-230 include dual-band 2.4 GHz and 5 GHz operation with 802.11ac wave-2 (433 Mbps), Bluetooth 5.0 with LE 2M PHY and LE Coded PHY support, integrated shield and reference clock, and an SDIO 3.0 + UART host interface. The SMD package is reflow-compatible at standard 260 °C peak profile, and antenna is not included (typical for modules with host-board antenna or external antenna pigtail). Operating temperature is rated for industrial -30 °C to +85 °C environments. Architecturally, the module integrates the Infineon CYW43455 die, a 37.4 MHz reference crystal, RF matching network, transmit balun, low-noise PA chain, and DC-DC regulators on a multilayer ceramic substrate with metal shield. Wi-Fi and Bluetooth radios share an antenna diversity topology with internal coexistence arbitration, allowing simultaneous 2.4 GHz WLAN + BT operation with on-chip packet scheduling. The module presents a standard SDIO 3.0 interface to the host MCU/MPU for WLAN and a 4-wire UART (plus PCM for BT audio) for Bluetooth. Typical applications include Wi-Fi 5 + BLE smart-home gateways, industrial IoT gateways, wireless POS terminals, audio streaming products (BT classic A2DP + Wi-Fi), medical telemetry devices, and consumer electronics that need modern dual-band connectivity without in-house RF expertise. The integrated shield dramatically simplifies EMC compliance at the end-product level. When designing with the LBEE5HY1MW-230, allocate a keep-out zone under the antenna feed, provide a clean 3.3 V rail with adequate bulk decoupling, and follow Murata's reference layout for the host-board antenna or pigtail. Host-driver selection (Linux/Backport, Android HAL, or vendor-specific MCU port) is critical - confirm firmware compatibility before committing to the design. This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet alone.
LBES0ZZ2FR-580 - Wi-Fi 6 + BT 5.4 + 802.15.4 Module | Murata
The Murata LBES0ZZ2FR-580 is a Type 2FR multi-radio SMD transceiver module based on the NXP RW612 combo chipset, supporting IEEE 802.11a/b/g/n/ac/ax (Wi-Fi 6) dual-band, Bluetooth LE 5.4, IEEE 802.15.4 (Thread/Zigbee), and Matter smart-home connectivity in a single, highly integrated 140-pin surface-mount package. A Wi-Fi + Bluetooth module is a pre-certified radio subsystem that combines an RF transceiver, baseband processor, and integrated antenna or RF trace on a single PCB. These modules dramatically reduce BOM count, FCC/CE/TELEC certification cost, and PCB complexity by abstracting the radio hardware and presenting a host MCU interface. The Type 2FR sits in the module product hierarchy between simple Wi-Fi-only modules and full SoC platforms, and is widely adopted in connected smart devices, enterprise and industrial automation, smart accessories, and smart-energy endpoints. Dual-band 2.4 GHz and 5 GHz operation plus 802.15.4 makes it a true multiprotocol gateway IC for Matter, Thread, and Zigbee ecosystems. Key features include dual-band 2.4 GHz and 5 GHz Wi-Fi 6 (802.11ax) operation, Bluetooth LE 5.4 with long-range and direction-finding support, integrated 802.15.4 radio for Thread and Zigbee, an integrated high-performance Arm Cortex-M33 application MCU with advanced security (secure boot, crypto accelerators, TrustZone-M), a supply voltage range of 3.14 V to 3.46 V (typical 3.3 V), output power from 12 to 18 dBm, and receive sensitivity down to -104.7 dBm depending on modulation. The surface-mount LGA-style module ships tape-and-reel and is lead-free. The RW612 silicon inside combines a Wi-Fi 6 MAC/PHY, Bluetooth 5.4 LE radio, and 802.15.4 PHY on a single die with an internal PA, LNA, and RF front-end. Murata integrates the chipset, crystal, RF matching, and shielding into a module that is pre-certified for major regulatory domains, eliminating the customer's RF design risk and antenna tuning effort. The on-die Cortex-M33 host allows bare-metal or RTOS firmware to run directly on the module, removing the need for an external host MCU for many IoT edge applications. Typical applications include Matter-compatible smart-home hubs, Thread border routers, Wi-Fi/BLE smart appliances, industrial IoT gateways, asset-tracking sensors, and connected lighting controllers. The dual-band Wi-Fi 6 capability is particularly valuable in congested environments where 2.4 GHz-only devices suffer interference from neighboring Wi-Fi networks, microwaves, and Bluetooth peripherals. When designing with this module, follow Murata's reference layout and grounding recommendations exactly. The RF trace routing, decoupling placement, and host-interface pin mapping are pre-engineered; deviating from the reference design will degrade RF performance and may void regulatory certifications. Use the recommended host-driver SDK from NXP/Murata to leverage the integrated MCU and radio coexistence features.
LBEU5ZZ1WL-633EVB - LoRaWAN GNSS BLE Wi-Fi Eval Board | Murata
The Murata LBEU5ZZ1WL-633EVB is an evaluation board for the Type 1WL (LBEU5ZZ1WL-633) multi-technology fused LoRaWAN geolocation module, which combines Semtech LR1110 LoRa/Wi-Fi/GNSS scanning, a STMicroelectronics STM32WB55VGY6 wireless MCU, and an Airoha MT3333AV high-performance GNSS receiver in one platform for developing low-cost IoT tracking devices. An LPWAN geolocation module is a type of wireless connectivity module that fuses long-range low-power radio (LoRaWAN) with multiple positioning technologies (satellite GNSS, Wi-Fi access-point scanning, and GNSS scanning). Within the system hierarchy, it sits above individual transceivers and below complete end products, providing a pre-certified radio subsystem for asset tracking, telemetry, and industrial IoT nodes. Key features include ultra-low power design: the internal MCU draws only 4.7 uA typical in stop2 mode with RTC running while the LR1110 and MT3333 are off, per the Type 1WL datasheet (Rev. D, VDD = 3.3 V, 25 C). Wireless coverage spans LoRa sub-GHz, Wi-Fi 802.11b/g/n at 2.4 GHz, Bluetooth v5.2, and GNSS including GPS and BeiDou. The STM32WB55 provides an ARM Cortex-M4 core with 256 KB RAM and 1 MB Flash, plus a USB 2.0 full-speed interface that is USB-IF certified. Technically, the module fuses three positioning engines: LR1110 Wi-Fi and GNSS scanning delivers indoor/outdoor fixes without acquiring full satellite signals, the MT3333AV provides standalone high-performance GNSS, and LoRaWAN uplink transports position and telemetry to network servers such as those used by Abeeway-based tracking solutions. The evaluation board exposes the module interfaces, antenna connections (antenna not included on the module), and USB connectivity for rapid prototyping. Typical applications include battery-powered asset trackers for logistics, industrial equipment monitoring, indoor/outdoor personnel and livestock tracking, and smart-city IoT sensors that need multi-year battery life. The 4.7 uA sleep current enables designs that run for years on a primary lithium cell. Design consideration: budget antenna selection and RF layout early, since the module ships without an antenna and GNSS/Wi-Fi/LoRa performance depends heavily on placement and ground-plane design. This page synthesizes distributor availability, datasheet-derived specifications, and practical design notes not found in the manufacturer datasheet alone.
LBUA0VG2BP-741 - NXP SR150 UWB Transceiver Module | Murata
The Murata Electronics LBUA0VG2BP-741 is an ultra-small Ultra-Wideband (UWB) module, the Murata Type 2BP, which integrates the NXP SR150 UWB chipset together with clock, filters, and peripheral components in a surface-mount package with antenna not included. It is a multiprotocol RF transceiver module implementing IEEE 802.15.4 UWB communication for precision ranging and secure fine-ranging applications. An Ultra-Wideband module is a short-range radio transceiver that transmits data across a very wide spectrum (several gigahertz of bandwidth) at very low power density. Within the wireless-connectivity hierarchy, UWB sits alongside Bluetooth Low Energy, Zigbee, and Wi-Fi as a personal-area-network technology, but it is distinguished by time-of-flight measurement capability, which enables centimeter-level distance and positioning accuracy that narrowband radios cannot achieve. Key features of the LBUA0VG2BP-741 include the integrated NXP SR150 UWB chipset, onboard clock and filtering, channels 9 support, low current consumption, and a compact, high-quality form factor. DigiKey lists the part as an 802.15.4 UWB transceiver module, surface mount, antenna not included, allowing designers to select an antenna optimized for their enclosure and region. The module architecture offloads RF design complexity from the customer PCB, since matching networks and sensitive RF routing are already engineered inside the certified module. Technically, the module builds on the NXP SR150, which implements ultra-wideband impulse-radio signaling compliant with the IEEE 802.15.4z-era UWB physical layers used in FiRa-class ranging. Time-of-flight and angle-related measurements are performed between compliant devices for secure keyless entry, asset tagging, and indoor positioning. Because the SR150, crystal clocking, and RF filters are pre-integrated, the host MCU communicates over a digital interface, dramatically reducing certification and RF-tuning effort compared with a discrete chipset design. Typical applications include UWB keyless-entry systems for automotive and access control, real-time location systems (RTLS) and indoor asset tracking, secure contactless payment and device-to-device ranging in IoT devices, and drones or robotics requiring precise relative positioning. Its low current consumption and small size make it well suited to battery-powered tags and compact sensor nodes. Design consideration: since the antenna is not included, antenna selection, feed-line layout, and placement directly affect conducted performance and regulatory compliance; follow the Murata Type 2BP specification document for recommended antenna and layout guidance. This page synthesizes distributor listings, availability signals from seven distributors via Octopart, and design context not found in the manufacturer specification sheet alone. Pricing tiers are marked as needing verification as of 2026-10-20.
LBUA2ZZ2DK-882 - UWB + Bluetooth LE Combo Module | Murata
The Murata Electronics LBUA2ZZ2DK-882 is a Type 2DK all-in-one Ultra-Wideband (UWB) and Bluetooth LE combo module covering 6.25 GHz to 8.25 GHz for UWB plus 2.4 GHz Bluetooth v5.0, housed in an LGA-127 surface-mount package (19.6 x 18.2 x 2.3 mm) with an on-board chip antenna. An Ultra-Wideband module is a short-range, high-precision RF transceiver that transmits narrow pulses across a wide spectrum, enabling centimeter-level ranging and secure fine-ranging. Within the wireless connectivity hierarchy, it sits alongside BLE, Wi-Fi and GNSS as a radio module, and combo modules such as this integrate both the UWB PHY and a companion short-range radio plus host MCU on a single certified, pre-tested footprint, dramatically reducing RF design effort compared with discrete chipsets. Key features include the NXP Trimension SR040 UWB chipset for IEEE 802.15.4z-class fine ranging, the NXP QN9090 Bluetooth LE and ARM Cortex-M4-based MCU for application processing, and an integrated antenna with matching components and crystals already on-board. This all-in-one integration means developers avoid antenna tuning and RF layout iterations, achieving regulatory radio certification with a single module. Technically, the module combines two independent radio chains: the SR040 handles UWB channel access in the 6.25-8.25 GHz band used for secure distance bounding, while the QN9090 provides Bluetooth v5.0 LE connectivity for provisioning, data backhaul and device-to-device communication. Low-power design supports coin-cell battery operation, which is central to the tag and tracker use case. Typical applications include UWB tags and trackers, smart-door locks and access control, indoor positioning and asset tracking in factories and hospitals, and general IoT devices that need precise ranging plus a BLE control link. A key design consideration is power budgeting: UWB ranging sessions dominate energy consumption, so duty-cycle the UWB radio and rely on BLE for standby communication to maximize coin-cell life. This page synthesizes distributor inventory data, drop-in alternative analysis, and practical design notes not found in the manufacturer datasheet, verified as of 2026-10-20.
LBUA5QJ2AB-828 - UWB + BLE 5.2 Combo Module | Murata
The Murata LBUA5QJ2AB-828 is a hostless UWB (ultra-wideband) + Bluetooth 5.2 Low Energy combo transceiver module supporting UWB operation across the 6250 MHz to 8250 MHz range (IEEE 802.15.4z channels, Band 5 and Band 9) in a compact 10.5 x 8.3 mm surface-mount LGA package with 97 pins. Antenna is not included, allowing design flexibility with external UWB and BLE antennas. An ultra-wideband module is a short-range, high-precision radio module that transmits nanosecond-scale pulses across very wide bandwidths, enabling centimeter-level distance measurement (secure ranging) that narrowband radios such as Bluetooth or Wi-Fi cannot achieve. UWB modules sit within the broader RF transceiver module hierarchy, and combo modules like this one pair UWB ranging with a conventional low-power radio for wake-up, control, and data functions. Key features include the Qorvo QM33120W UWB chipset paired with an integrated Nordic Semiconductor nRF52840 that provides Bluetooth 5.2 LE, firmware update, and wake-up control. The module is FCC/IC/TELEC reference certified, dramatically reducing end-product regulatory effort. An integrated 3-axis accelerometer supports battery-saving duty cycling, and reference clocks for both the UWB chip and MCU are embedded on the module, simplifying BOM and calibration. Architecturally, the hostless design means the nRF52840 manages the UWB radio autonomously, allowing UWB ranging sessions to execute without waking the host processor. The nRF52840 provides 1 MB flash and 256 kB RAM for embedded application code, with host interfaces including I2C, SPI, UART, and USB. Typical applications include secure car-access key fobs and automotive door-zone detection, indoor asset tracking and real-time location systems (RTLS), and smart-door locks and access-control systems where UWB secure ranging prevents relay attacks. Design consideration: since the antenna is not integrated, place the module near the antenna connectors with controlled-impedance RF traces and follow Murata's reference layout for the 6.5 GHz and 8 GHz bands to pass certification. This page synthesizes distributor pricing, cross-reference findings, and design guidance not consolidated in the manufacturer datasheet.
LBWA0ZZ2HK - Sub-1GHz Wi-Fi HaLow 11ah Module | Murata | IoT
The Murata LBWA0ZZ2HK (Type 2HK) is a long-range Sub-1GHz Wi-Fi HaLow system-on-module based on the NEWRACOM NRC7394 chipset, supporting IEEE 802.11ah SISO operation in the 902 MHz to 928 MHz band with a communication range of up to 2 km, packaged as a compact surface-mount connectivity module. A Wi-Fi HaLow module is a wireless connectivity subsystem that implements the IEEE 802.11ah standard, which operates in sub-1 GHz license-exempt spectrum rather than the crowded 2.4 GHz and 5 GHz bands used by conventional Wi-Fi. Within the network hierarchy, it sits between a host microcontroller or application processor and the RF front end and antenna, offloading the full MAC and PHY of the 802.11ah S1G standard. Sub-1 GHz radios trade raw throughput for dramatically longer range, better penetration through walls and foliage, and lower power consumption, making HaLow the Wi-Fi-family choice for IoT mesh and star networks where 2.4 GHz Wi-Fi, BLE, or 802.15.4 range is insufficient. Key features of the LBWA0ZZ2HK include its NRC7394 chipset base supporting 802.11ah SISO, coverage of the 902-928 MHz US band, ultra-low power consumption with advanced sleep features for battery operation, an embedded RTOS with IP-native application support, and Murata-grade module integration that simplifies regulatory certification (FCC ID VPYLBWA0ZZ2HK). Technically, the module integrates the NRC7394 SoC, crystal, RF matching network, and flash into a single shielded land-grid package. The 2 km link range is achieved by combining narrowband sub-1 GHz propagation with the robust modulation and coding schemes of 802.11ah. The embedded RTOS and TCP/IP stack allow the host processor to use simple AT-style or socket interfaces instead of implementing a Wi-Fi stack. Typical applications include smart utility metering, industrial sensor networks, smart-city infrastructure, agricultural monitoring, and battery-powered security and access-control devices - all scenarios where devices are spread over campus-scale distances and must run for years on batteries. Design-wise, provide a clean 3.3 V supply with local decoupling, route the antenna per Murata's FCC integration instructions, and account for HaLow transmit bursts in battery budget calculations rather than using average current alone. This page synthesizes verified manufacturer and distributor data, drop-in alternatives, engineering design notes, and FAQ content not found together in the product brief.