EP2A25F672I-7 vs EP2A25F672I-9 Сравнение
Подробное сравнение бок о бок EP2A25F672I-7 от Intel и EP2A25F672I-9 от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EP2A25F672I-7 | EP2A25F672I-9 |
|---|---|---|
| Бренд | Intel | Intel |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $171,00 | $195,00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| System Gates | 900K (approximately) | — |
| Logic Cells / Elements | 24,320 | — |
| Maximum Operating Frequency | 500 MHz | — |
| Process Technology | 0.15 um | 0.18 µm CMOS |
| Core Voltage | 1.5 V | 1.5 V / 1.8 V (speed-grade dependent) |
| Корпус | 672-pin FC-FBGA | 672-pin FCBGA (FineLine BGA) |
| Тип монтажа | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| Speed Grade | -7 | -9 |
| Рабочая температура | -40C to +85C (Industrial) | — |
| Temperature Grade | Industrial (I) | — |
| Configuration Method | JTAG, Passive Serial, Active Serial | JTAG / serial configuration EPROM |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| Статус RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Уровень MSL | [DATA_NEEDED: MSL level] | — |
| Embedded Memory | ESBs (Embedded System Blocks) | — |
| Logic Elements (typical) | — | 25,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESB) Memory | — | 1,125 Kbits |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O pins] |
| Number of PLLs | — | 4 |
| Operating Temperature Grade | — | Industrial (-40 °C to +100 °C junction) |
| Уровень чувствительности к влаге (MSL) | — | 3 (per Vyrian listing) |
| Peak Reflow Temperature | — | 220 °C (per Vyrian listing) |
| Supported I/O Standards | — | LVTTL, LVCMOS, LVDS, PCI |
| Legacy Status | — | Obsolete - consult Altera / Intel FPGA archive for documentation |