EPM5192LC vs EPM5192JC-1 Сравнение
Подробное сравнение бок о бок EPM5192LC от Altera и EPM5192JC-1 от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EPM5192LC | EPM5192JC-1 |
|---|---|---|
| Бренд | Altera | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $28,40 | $22,40 |
| Family | MAX 7000S | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | 84 |
| Dedicated Inputs | 7 | — |
| Global Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 55 ns (typical, commercial) | 40 ns (speed grade -1) |
| Maximum Clock Frequency (fMAX) | 50 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | 4.75 V to 5.25 V |
| Process Technology | CMOS, UV-erasable/OTP EPROM configuration | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA), fixed delay | — |
| Boundary-Scan Support | JTAG IEEE 1149.1 | — |
| Programming Interface | JTAG (ByteBlaster-compatible) | Altera MAX programming interface (parallel, pre-JTAG for this family) |
| Operating Temperature (commercial) | 0C to +70C | — |
| Корпус | JLCC-68 (windowed ceramic, LC suffix) | — |
| Тип монтажа | Surface Mount | — |
| Статус RoHS | [DATA_NEEDED: RoHS status] | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Technology | — | CMOS, UV-Erasable / OTP |
| Usable Gates | — | 3750 |
| Maximum Internal Frequency (fMAX) | — | 62.5 MHz |
| Package Type | — | 84-pin Ceramic Quad Flat Pack (CQFP), windowed |
| JEDEC Package Code | — | S-CQCC-J84 |
| Рабочая температура | — | 0 C to +70 C (commercial) |
| Configuration Memory | — | UV-EPROM (erasable under UV lamp) |
| Process | — | CMOS EPROM |
| I/O Standard | — | TTL/CMOS 5 V compatible |