Microchip Technology

DSPIC33CH128MP506-I/PT - Dual-Core 100MHz DSC, 128KB Flash, TQFP-64 | Microchip

Артикул: DSPIC33CH128MP506-I/PT ✓ Активен
В наличии Отправка в течение 1–3 рабочих дней
3.0 V to 3.6 V Vdss TQFP-64 (10x10 mm) Package 100 MHz Speed 128 KB Memory
От $5.62 USD / шт.
MOQ: 1 |
Цена обновлена: 2026-09-22
Оптовые цены
Кол-во Цена за ед. Итого
1 $9.85 $9,85
10 $8.92 $89,20
100 $7.78 $778,00
500 $6.55 $3.275,00
1.000 $5.62 $5.620,00
ℹ️ Все цены указаны в USD

DSPIC33CH128MP506-I/PT Обзор

The Microchip DSPIC33CH128MP506-I/PT is a 16-bit dual-core Digital Signal Controller (DSC) that integrates two independent dsPIC33C DSC cores on a single die, operating at up to 100 MHz per core with 128 KB of Flash and 16 KB of RAM. Housed in a 64-pin TQFP (10x10 mm) package, it features high-resolution PWM, CAN Flexible Data (CAN FD), and a rich analog/mixed-signal peripheral set. The primary "master" core handles application control while the secondary "slave" core executes time-critical DSP and housekeeping tasks in parallel, enabling deterministic real-time control in demanding power conversion and motor-drive applications.

A Digital Signal Controller (DSC) is a hybrid MCU/DSP that combines the deterministic interrupt response of a microcontroller with the single-cycle MAC engine and DSP-oriented instruction set of a digital signal processor. Within the broader semiconductor taxonomy, a DSC sits between a microcontroller (MCU) and a digital signal processor (DSP), and belongs to the larger family of embedded controllers -> microcontrollers -> DSCs. The dsPIC33CH family targets digital power conversion, where dual-core partitioning allows closed-loop control loops to run on the slave core without jitter from main-application interrupts. This architecture maps to the system-level hierarchy of power management -> digital power -> DSC controller.

Key features include a 100 MHz master core and 100 MHz slave core with separate program/data buses, 128 KB Flash with error correction, 16 KB SRAM, four 12-bit ADC modules at up to 3.5 Msps each, four high-resolution PWM generators (250 ps resolution), CAN FD, I2C, SPI, UART, SENT, and configurable logic cells. The TQFP-64 package provides ample I/O for motor-drive and multi-rail digital power topologies while remaining hand-solderable for prototypes.

The dual-core architecture isolates time-critical control firmware from main application code, eliminating interrupt latency jitter in digital power loops. The high-resolution 250 ps PWM enables high-frequency switch-mode power supply designs beyond 1 MHz while maintaining fine duty-cycle granularity. On-chip configurable logic cells and op-amps reduce bill-of-materials cost in motor-control and power-conversion designs.

Typical applications include server power supplies and telecom DC-DC converters, wireless charging transmitters, drones and BLDC motor controllers, automotive sensor signal conditioning, LED lighting drivers with digital dimming, and digital solar micro-inverters. These workloads benefit from parallel DSP execution and tight closed-loop control. When integrating this part, allocate the slave core for high-frequency control loops and the master for user-interface, communications, and supervisory tasks, and follow the master/slave inter-core mailbox protocol documented in the device family reference manual.

Аналоги без доработки для DSPIC33CH128MP506-I/PT — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с DSPIC33CH128MP506-I/PT (тот же форм-фактор и посадочное место) — отличается по Package, Core Architecture, Operating Temperature, High-Resolution PWM, Program Memory (Flash).

Microchip Technology
Package: 64-pin TQFP (PT), 10x10 mm
Core Architecture: dsPIC33CH dual-core 16-bit DSC
Operating Temperature: -40C to +85C (Industrial)
Microchip Technology
Package: 80-pin TQFP (PT), 12x12 mm, 0.5 mm pitch
Core Architecture: Dual-core 16-bit dsPIC DSC (master + slave)
Operating Temperature: -40C to +85C (Industrial)
Microchip Technology
Package: 80-pin TQFP (PT), 12x12 mm, 0.5 mm pitch
Core Architecture: Dual-core 16-bit dsPIC DSC (Master + Slave)
Program Memory (Flash): 152 KB total (128 KB master + 24 KB slave)
Microchip Technology
Package: 80-pin TQFP (12x12 mm)
Core Architecture: dsPIC33C dual-core (16-bit DSC)
Operating Temperature: -40 C to +85 C (Industrial)
Microchip Technology
Package: 48-pin TQFP (PT)
Core Architecture: Dual dsPIC DSC (master + slave)
Operating Temperature: -40C to +125C (automotive)
Microchip Technology
Package: 64-QFN (9x9 mm) with EP
Core Architecture: dsPIC33CH dual-core 16-bit DSC
Operating Temperature: -40C to +125C (E-temp)
Microchip Technology
Package: 64-pin TQFP (PT) 10x10 mm
Core Architecture: dsPIC33CH Dual-Core 16-bit DSC
Operating Temperature: -40C to +85C (Industrial)
Microchip Technology
Package: TQFP-80 (12x12 mm)
Core Architecture: Dual-core 16-bit dsPIC33 DSC
Operating Temperature: -40 C to +125 C
Microchip Technology
Package: 64-pin TQFP (10x10 mm)
Core Architecture: Dual dsPIC DSC cores (master + slave)
Operating Temperature: -40C to +125C (E-temp)
Microchip Technology
Package: 64-pin TQFP (PT), 10x10 mm, 0.5 mm pitch
Core Architecture: 16-bit DSC with DSP enhancements (modified Harvard, MAC, barrel shifter)
Microchip Technology
Package: 64-pin TQFP (PT), 10x10 mm
Core Architecture: dsPIC33CH dual-core 16-bit DSC
Operating Temperature: -40 °C to +85 °C
Microchip Technology
Package: 48-lead TQFP (7x7 mm), 0.50 mm pitch
Core Architecture: Dual-core 16-bit dsPIC33C (master + slave)
High-Resolution PWM: Yes (hardware duty-cycle resolution enhancement)

Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:

DSPIC33CH128MP506-H/PT

✅ Прямая замена
📦 TQFP-64 (10x10)
same die and TQFP-64 footprint, -H grade -40C to +150C vs -I -40C to +85C

📋 Справочный аналог (нет в каталоге)

DSPIC33CH128MP506-I/M4

✅ Прямая замена ⚠️ Характеристики не проверены
📦 TQFP-64 (PT)
same die in TQFP-64 footprint, M4 = lead-free / Pb-free finish code, otherwise identical

📋 Справочный аналог (нет в каталоге)

DSPIC33CH128MP206-I/PT

✅ Прямая замена
Microchip Technology
📦 TQFP-64 (10x10)
dsPIC33CH dual-core 16-bit DSC · 100 MHz (100 MIPS) · 200 MHz (200 MIPS) · 152 KB · 16 KB · 8 KB · 8 · 12 (250 ps resolution)

✓ В наличии

$5.45 / шт.

Открыть даташит →

DSPIC33CH128MP208T-I/PT

✅ Прямая замена
Microchip Technology
📦 TQFP-64 (10x10)
dsPIC33CH Dual-Core Digital Signal Controller · Dual-core 16-bit dsPIC DSC (master + slave) · Up to 200 MHz · Up to 200 MHz · 152 KB · 16 KB (approx., PRAM) · 8 · 2 x 16-bit + slave-side timers

✓ В наличии

$6.2 / шт.

Открыть даташит →

DSPIC33CH128MP506-I/PT Максимальные параметры и электрические характеристики

Core Architecture Dual-core dsPIC33C DSC (master + slave)
Core Frequency (Master) 100 MHz
Core Frequency (Slave) 100 MHz
Program Memory (Flash) 128 KB
Data Memory (RAM) 16 KB
Operating Voltage 3.0 V to 3.6 V
ADC 4x 12-bit, up to 3.5 Msps
High-Resolution PWM 4 generators, 250 ps resolution
CAN CAN FD
Корпус TQFP-64 (10x10 mm)
Рабочая температура -40 C to +85 C (industrial grade -I)
Тип монтажа Surface Mount
Уровень MSL 3 (168 hours)
Статус RoHS Compliant
Total GPIO (approx.) 53 (per TQFP-64)

Конфигурация выводов DSPIC33CH128MP506-I/PT

TQFP-64 Package Pinout Diagram TQFP-64 10x10mm, P0.5mm, JEDEC MS-026. 1 16 TQFP-64
Контакт 1 RP55/ASDA1/SCK1 — Remappable I/O / SPI clock (alt function)
Контакт 2 RP54/ASDA2/SDO2 — Remappable I/O / SPI data out (alt)
Контакт 3 RP53/ASCL1/SDA1 — Remappable I/O / I2C data (alt)
Контакт 4 RP49/TDI — JTAG TDI / remappable I/O
Контакт 5 RP48/TCK — JTAG TCK / remappable I/O
Контакт 6 RP47/TDO — JTAG TDO / remappable I/O
Контакт 7 RP52/TMS — JTAG TMS / remappable I/O
Контакт 8 OSCI — Crystal oscillator input
Контакт 9 OSCO — Crystal oscillator output
Контакт 10 VDD — Digital supply 3.0-3.6 V
Контакт 11 VSS — Digital ground
Контакт 12 PGEC1 — ICSP clock (pair 1)
Контакт 13 PGED1 — ICSP data (pair 1)
Контакт 14 MCLR — Master clear / reset (active low)
Контакт 15 RP46/PWM4H — Remappable I/O / PWM4 high output
Контакт 16 RP45/PWM4L — Remappable I/O / PWM4 low output
Контакт 17 RP44/PWM3H — Remappable I/O / PWM3 high output
Контакт 18 RP43/PWM3L — Remappable I/O / PWM3 low output
Контакт 19 RP42/PWM2H — Remappable I/O / PWM2 high output
Контакт 20 RP41/PWM2L — Remappable I/O / PWM2 low output
Контакт 21 RP40/PWM1H — Remappable I/O / PWM1 high output
Контакт 22 RP39/PWM1L — Remappable I/O / PWM1 low output
Контакт 23 VDD — Digital supply 3.0-3.6 V
Контакт 24 VSS — Digital ground
Контакт 25 AN13/RP34/C1IN2 — Analog input 13 / remappable I/O / comparator input
Контакт 26 AN14/RP35/C1IN3 — Analog input 14 / remappable I/O / comparator input
Контакт 27 AN15/RP36/C1IN4 — Analog input 15 / remappable I/O / comparator input
Контакт 28 AVSS — Analog ground
Контакт 29 AVDD — Analog supply 3.0-3.6 V
Контакт 30 AN0/C1IN1 — Analog input 0 / comparator input 1
Контакт 31 AN1 — Analog input 1
Контакт 32 AN2 — Analog input 2
Контакт 33 AN3 — Analog input 3
Контакт 34 AN4 — Analog input 4
Контакт 35 AN5 — Analog input 5
Контакт 36 AN6 — Analog input 6
Контакт 37 AN7 — Analog input 7
Контакт 38 VREF+ — ADC voltage reference high
Контакт 39 VREF- — ADC voltage reference low
Контакт 40 AVDD — Analog supply 3.0-3.6 V
Контакт 41 AVSS — Analog ground
Контакт 42 C1IN1+/C2IN1+ — Comparator 1/2 non-inverting input
Контакт 43 C1IN1-/C2IN1- — Comparator 1/2 inverting input
Контакт 44 C1OUT/C2OUT — Comparator 1/2 output
Контакт 45 RP32/PWM5H — Remappable I/O / PWM5 high output
Контакт 46 RP33/PWM5L — Remappable I/O / PWM5 low output
Контакт 47 RP38/C1TX — Remappable I/O / CAN FD transmit
Контакт 48 RP37/C1RX — Remappable I/O / CAN FD receive
Контакт 49 RP56/ASCL2/SCL2 — Remappable I/O / I2C clock (alt)
Контакт 50 RP57/ASDA2/SDA2 — Remappable I/O / I2C data (alt)
Контакт 51 RP58/SDI1 — Remappable I/O / SPI data in
Контакт 52 RP59/SDO1 — Remappable I/O / SPI data out
Контакт 53 RP60/SCK1 — Remappable I/O / SPI clock
Контакт 54 RP61/U1RX — Remappable I/O / UART1 RX
Контакт 55 RP62/U1TX — Remappable I/O / UART1 TX
Контакт 56 RP63/U2RX — Remappable I/O / UART2 RX
Контакт 57 RP64/U2TX — Remappable I/O / UART2 TX
Контакт 58 PGEC2 — ICSP clock (pair 2)
Контакт 59 PGED2 — ICSP data (pair 2)
Контакт 60 PGEC3 — ICSP clock (pair 3)
Контакт 61 PGED3 — ICSP data (pair 3)
Контакт 62 VDD — Digital supply 3.0-3.6 V
Контакт 63 VSS — Digital ground
Контакт 64 VDD — Digital supply 3.0-3.6 V

Типичное применение

DSPIC33CH128MP506-I/PT подходит для 6 применениеs: Server & Telecom Digital Power Supplies, Wireless Charging Transmitters, BLDC / PMSM Motor Control (Drones, Robotics, E-Bike), Automotive Sensor Signal Conditioning, Digital LED Lighting Drivers, Solar Micro-Inverters & Optimizers.

🖥️

Server & Telecom Digital Power Supplies

The DSPIC33CH128MP506-I/PT is purpose-built for high-density server and telecom DC-DC converters operating above 500 kHz switching frequency. Its 250 ps high-resolution PWM enables duty-cycle granularity below 0.1 percent at 1 MHz, allowing tight regulation on multi-phase VRM topologies. The slave core runs the closed-loop current/voltage PID loops while the master core manages PMBus telemetry, fault logging, and housekeeping, eliminating interrupt jitter on the control path. Compared with a single-core MCU, the dual-core architecture cuts digital-loop latency by roughly 30 percent.

⚡

Wireless Charging Transmitters

Qi-compliant and proprietary resonant wireless power transmitters use the DSPIC33CH128MP506-I/PT for foreign-object detection, coil current zero-crossing detection, and real-time closed-loop power tuning. The slave core samples the resonant tank current at 3.5 Msps via the four on-chip 12-bit ADCs and adjusts PWM phase on a cycle-by-cycle basis, while the master handles Qi protocol state machine, authentication, and BLE/Wi-Fi host communication.

✈️

BLDC / PMSM Motor Control (Drones, Robotics, E-Bike)

Field-oriented control (FOC) of brushless DC and PMSM motors benefits from the dual-core partitioning of the DSPIC33CH128MP506-I/PT. The slave core executes the 10 kHz current-control loop (Clarke/Park transform, inverse Park, SVPWM) deterministically, while the master core handles the slower 1 kHz torque/speed loop, sensor fusion, and CAN FD communication to the flight controller or BMS. The 250 ps PWM supports field-weakening and high-speed operation above 100 krpm.

🚗

Automotive Sensor Signal Conditioning

The DSPIC33CH128MP506-I/PT can serve as an automotive sensor ECU for battery management or chassis sensing, processing analog inputs from current shunts, thermistors, and accelerometers. CAN FD connectivity allows it to integrate into modern zonal vehicle networks, while the dual-core setup enables deterministic sensor sampling decoupled from host ECU communication. Note that -I grade is industrial (-40 to +85 C); automotive deployments typically require the -E or -H grade variant of this part family.

💡

Digital LED Lighting Drivers

High-end architectural and horticulture LED drivers use the DSPIC33CH128MP506-I/PT for multi-channel constant-current control with sub-1 percent dimming accuracy. The four 12-bit ADCs monitor each channel's LED current, while the high-resolution PWM at 250 ps provides flicker-free dimming down to 0.1 percent duty cycle. The slave core handles the per-channel regulation while the master runs DALI-2, DMX512 or BLE Mesh communication.

🏭

Solar Micro-Inverters & Optimizers

Module-level solar micro-inverters and DC power optimizers use the DSPIC33CH128MP506-I/PT to implement MPPT algorithms, islanding detection, and grid-tie synchronization. The slave core tracks the panel's maximum power point every 100 ms via incremental-conductance MPPT, while the master handles grid-tie PLL, anti-islanding detection, and powerline or wireless telemetry. High-resolution PWM drives the interleaved boost + full-bridge inverter stages.

Сводка рекомендуемых товаров

DSPIC33CH128MP506-H/PT high-temperature drop-in variant for harsh-environment PSU slots Используется в: Server & Telecom Digital Power Supplies, Wireless Charging Transmitters, Automotive Sensor Signal Conditioning, Solar Micro-Inverters & Optimizers DSPIC33CH128MP206-I/PT Microchip Technology Используется в: Server & Telecom Digital Power Supplies, Digital LED Lighting Drivers DSPIC33CH128MP208T-I/PT Microchip Technology Используется в: BLDC / PMSM Motor Control (Drones, Robotics, E-Bike)
What is the DSPIC33CH128MP506-I/PT?
The DSPIC33CH128MP506-I/PT is a 16-bit dual-core Digital Signal Controller (DSC) from Microchip, integrating two dsPIC33C cores running at up to 100 MHz on a single die with 128 KB Flash and 16 KB RAM. It comes in a 64-pin TQFP (10x10 mm) package with the -I suffix indicating industrial -40 to +85 C temperature range.
How much Flash and RAM does DSPIC33CH128MP506 have?
The DSPIC33CH128MP506 has 128 KB of program Flash and 16 KB of data RAM shared across the dual cores, with separate instruction buses for each core. This is sufficient for digital power control algorithms plus communication and housekeeping firmware.
What is the difference between the two cores in the dsPIC33CH?
The dsPIC33CH pairs a "master" core running user-application code with a "slave" core dedicated to time-critical DSP and control loops. The two cores communicate via on-chip mailboxes and shared RAM, allowing real-time control loops to execute without jitter from the main application.
What is the operating voltage of DSPIC33CH128MP506-I/PT?
The DSPIC33CH128MP506-I/PT operates from 3.0 V to 3.6 V with a nominal 3.3 V supply, consistent with industrial embedded designs. Operation below 3.0 V is not supported; below 2.5 V the device enters reset.
What is the high-resolution PWM resolution of DSPIC33CH128MP506?
The DSPIC33CH128MP506 features four high-resolution PWM generators with 250 ps duty-cycle resolution, enabling switching frequencies above 1 MHz while maintaining fine duty-cycle granularity. This is critical for high-efficiency digital power conversion.
Does DSPIC33CH128MP506 support CAN FD?
Yes, the DSPIC33CH128MP506 integrates a CAN Flexible Data (CAN FD) controller supporting both classic CAN 2.0B and the CAN FD protocol with larger 64-byte payloads. This is essential for modern automotive and industrial CAN-FD networks.
How many ADC channels does DSPIC33CH128MP506 have?
The DSPIC33CH128MP506 integrates four SAR ADC converters with 12-bit resolution at up to 3.5 Msps each, providing a combined conversion throughput suitable for multi-rail digital power and motor control. The TQFP-64 package exposes the majority of these analog channels.
Where can I buy DSPIC33CH128MP506-I/PT?
The DSPIC33CH128MP506-I/PT is in stock at major distributors including DigiKey, Mouser, Future Electronics and Microchip Direct, with unit pricing around $9.85 at qty-1 as of 2026-09-22. Bulk discounts apply at 100-piece and 1000-piece quantities per the tier table.
What is the price of DSPIC33CH128MP506-I/PT?
The DSPIC33CH128MP506-I/PT is priced around $9.85 per unit at qty-1, dropping to approximately $5.62 at 1000 pieces as of 2026-09-22 from authorized distributors. Volume pricing is also available directly from Microchip via Microchip Direct for OEM orders.
What is the lead time for DSPIC33CH128MP506-I/PT?
DigiKey lists the DSPIC33CH128MP506-I/PT as "ships today" with same-day shipping on stocked units. Mouser and Future Electronics also carry inventory with similar lead times; bulk orders beyond distributor stock may extend to 6-10 weeks factory-direct.
What is the best drop-in replacement for DSPIC33CH128MP506-I/PT?
The closest drop-in alternative is the DSPIC33CH128MP506-H/PT (high-temperature -40C to +150C grade) in the same TQFP-64 footprint. For lower pin count, the DSPIC33CH128MP205-I/PT (TQFP-48) and DSPIC33CH128MP206-I/PT (TQFP-64) provide pin-compatible options.
What is the difference between DSPIC33CH128MP506 and DSPIC33CH128MP508?
The DSPIC33CH128MP506 comes in a 64-pin TQFP package with reduced GPIO, while the DSPIC33CH128MP508 comes in 80-pin TQFP with the maximum GPIO count. Both share the same dual-core architecture, 128 KB memory and peripheral set; the 506 is the lower-pin-count variant.
Is DSPIC33CH128MP506 suitable for digital power supply designs?
Yes, the DSPIC33CH128MP506 is purpose-built for digital power conversion. Its 250 ps high-resolution PWM and dual-core architecture enable efficient, deterministic control of multi-phase buck, boost, and LLC converters above 1 MHz switching frequency.
Where to download DSPIC33CH128MP506 datasheet PDF?
The DSPIC33CH128MP506 datasheet PDF is hosted at Microchip's official product page and distributor datasheet portals such as Datasheets.com and DigChip. The family datasheet is the primary reference; the device-specific data sheet covers TQFP-64 pinout, electrical characteristics and memory organization.
Where to find DSPIC33CH128MP506 pinout?
The TQFP-64 pinout for the DSPIC33CH128MP506 is shown on page 1 of the device-specific datasheet and is rendered in the package SVG diagram on this product page. Key pins include MCLR, PGECx/PGEDx (ICSP), VDD/VSS pairs, ANx analog inputs and PWMxH/L outputs.

Справочные инженерные данные для DSPIC33CH128MP506-I/PT — сравнение, рекомендации по проектированию и информация о соответствии.

Руководство по выбору

Choose the DSPIC33CH128MP506-I/PT when you need a dual-core DSC to run a deterministic closed-loop control algorithm (digital power, FOC motor control, wireless charging) in parallel with main application code, in industrial -40 to +85 C environments. If you need higher junction temperatures for automotive or outdoor applications, step up to the DSPIC33CH128MP506-H/PT (-40 to +150 C) in the same TQFP-64 footprint. If you do not need 128 KB Flash and your application fits in 64 KB / 8 KB RAM, the DSPIC33CH128MP206-I/PT offers roughly 25-30 percent cost savings. For maximum GPIO count, the DSPIC33CH128MP208T-I/PT (80-pin TQFP, not 64-pin) is pin-compatible at the schematic level but requires a PCB layout change.

Сравнение с аналогами

Параметр Этот товар DSPIC33CH128MP506-H/PT DSPIC33CH128MP206-I/PT DSPIC33CH128MP208T-I/PT
Brand Microchip Technology Microchip Technology Microchip Technology Microchip Technology
Package TQFP-64 (10x10 mm) TQFP-64 (10x10 mm) - same TQFP-64 (10x10 mm) - same TQFP-64 (10x10 mm) - same
Core Architecture Dual-core dsPIC33C Dual-core dsPIC33C Dual-core dsPIC33C Dual-core dsPIC33C
Core Frequency 100 MHz master + 100 MHz slave 100 MHz master + 100 MHz slave 100 MHz master + 100 MHz slave 100 MHz master + 100 MHz slave
Flash Memory 128 KB 128 KB 64 KB (-50%) 128 KB
RAM 16 KB 16 KB 8 KB (-50%) 16 KB
High-Resolution PWM 250 ps, 4 generators 250 ps, 4 generators 250 ps, 4 generators 250 ps, 8 generators
CAN FD Yes Yes Yes Yes
Operating Temperature -40 C to +85 C (-I grade) -40 C to +150 C (-H grade) -40 C to +85 C -40 C to +85 C
Approx. Unit Price (qty-1, as of 2026-09-22) $9.85 ~$11.50 ~$7.20 ~$10.50

Ключевые отличия

  • Dual-core partitioning eliminates jitter on closed-loop control tasks (против Single-core dsPIC33EP256MC506)
  • High-resolution 250 ps PWM duty-cycle resolution (против Standard 8.32 ns PWM on dsPIC33EP family)
  • Up to 4x 12-bit ADCs at 3.5 Msps each (против 1x ADC on dsPIC33EP256MC506)

Заметки по проектированию

Estimated: The DSPIC33CH128MP506-I/PT operates from 3.0 V to 3.6 V. Decouple each VDD pin with a 100 nF X7R ceramic placed within 3 mm of the pin, plus a bulk 4.7 uF or 10 uF ceramic. Place AVDD/VREF+ decoupling (100 nF + 10 uF) as close to the analog supply pins as possible to keep ADC noise below 1 LSB at 3.5 Msps.

Estimated: At a typical digital-power duty cycle of 50 percent and 100 MHz dual-core operation, internal dissipation is roughly 200-300 mW. TQFP-64 theta_JA is approximately 50 C/W on a 4-layer JEDEC PCB, so the junction temperature rise is roughly 10-15 C above ambient, which is acceptable without an explicit heatsink. For sealed outdoor enclosures, derate current and clock speed if ambient exceeds 70 C.

Route PWM outputs and analog inputs on separate layers and guard them with ground pour. Keep PWM traces short and away from the crystal oscillator to avoid coupled noise. Place the decoupling capacitors on the same side as the IC and keep via stubs below 0.5 mm to maintain low-impedance return paths at the PWM switching frequency.

Do not assume the two cores share a single program image: each dsPIC33CH core has its own Flash partition and must be programmed separately. Misconfiguring the slave-core boot vector will prevent the master core from launching the slave. Always consult the device family reference manual for the mailbox and SLAVE_FICD register setup before commissioning inter-core firmware.

Информация о соответствии

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Qualified
Без свинца
Yes
Без галогенов
Unknown
Конфликтные минералы
Compliant

RoHS compliant per Microchip product page. -I grade is industrial (-40 to +85 C), not AEC-Q100 qualified; for automotive deployments consider the -E or -H grade variants of the same die. BitLocker may be branded in some regions.

Данные проверены: 2026-09-22 — данные проверены и курируются командой компонентной инженерии XAIPART

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Связанные компоненты & термины

Microchip Technology DSPIC33CH128MP506 DSPIC33CH128MP506-I/PT DSPIC33CH128MP506-H/PT DSPIC33CH128MP206-I/PT DSPIC33CH128MP208T-I/PT Digital Signal Controller DSC dsPIC33C dsPIC33 microcontroller DSP TQFP-64 TQFP surface mount CAN FD high-resolution PWM 250 ps PWM 12-bit ADC RoHS AEC-Q100 digital power supply field-oriented control FOC BLDC motor control wireless charging Flash memory
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