Microchip Technology

DSPIC33CH64MP206-E/MR - 100MHz Dual-Core 16-Bit DSC | Microchip

Артикул: DSPIC33CH64MP206-E/MR ✓ Активен
В наличии Отправка в течение 1–3 рабочих дней
3.0 V to 3.6 V Vdss 64-VFQFN exposed pad, 9x9 mm (MR) Package 180 MHz (200 MIPS) Speed 64 KB Memory
От $3.59 USD / шт.
MOQ: 1 |
Цена обновлена: 2026-09-22
Оптовые цены
Кол-во Цена за ед. Итого
1 $5.96 $5,96
10 $5.36 $53,60
100 $4.78 $478,00
500 $4.18 $2.090,00
1.000 $3.59 $3.590,00
ℹ️ Все цены указаны в USD

DSPIC33CH64MP206-E/MR Обзор

The Microchip Technology DSPIC33CH64MP206-E/MR is a dual-core 16-bit Digital Signal Controller (DSC) integrating a master and a slave dsPIC33C core on a single die. The master core runs at 180 MHz (200 MIPS) while the slave core operates at 200 MHz, paired with 64 KB of Flash, 8 KB of SRAM and 16 KB of PRAM in a 64-pin QFN (9x9 mm, MR) package with an exposed thermal pad. The 'E' suffix indicates an extended temperature grade of -40C to +125C for industrial environments.

A Digital Signal Controller (DSC) is a hybrid class of microcontroller that fuses a deterministic MCU pipeline with a single-cycle DSP engine. The dsPIC33CH family builds on this with dual-core heterogeneous partitioning: one core supervises the system, runs communications and housekeeping, while the second core deterministically executes time-critical DSP loops. Architecturally the chip sits in the power-management / motor-control tier of the embedded hierarchy - DSC -> microcontroller -> embedded processor -> semiconductor.

Key features include dedicated high-resolution 16-bit PWM channels optimized for digital power conversion, integrated CAN Flexible Data (CAN FD) peripherals, up to 12-bit ADC at 3.5 Msps, configurable logic cells, and an integrated op-amp. Functional Safety (FuSa) support libraries and Class B/Safety diagnostics are bundled. The 64-pin QFN package provides compact board footprint while preserving analog pinout density.

Typical applications include wireless charging transmitters, server and telecom SMPS, BLDC/PMSM motor control, drone ESCs, automotive sensor fusion, and digital LED lighting. The dual-core architecture lets firmware split time-critical control loops from user-interface code without task-switching jitter. When designing with this part, populate the exposed thermal pad with a continuous copper plane and stitch vias to inner ground layers; at 200 MIPS the slave core can pull substantial current during heavy DSP bursts.

Аналоги без доработки для DSPIC33CH64MP206-E/MR — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с DSPIC33CH64MP206-E/MR (тот же форм-фактор и посадочное место) — отличается по Core Architecture, Package, Operating Temperature, ADC, PWM Resolution.

Microchip Technology
Core Architecture: dsPIC33CH dual-core 16-bit DSC
Package: 64-pin TQFP (PT), 10x10 mm
Operating Temperature: -40C to +85C (Industrial)
Microchip Technology
Core Architecture: Dual-core dsPIC33C DSC (master + slave)
Package: TQFP-64 (10x10 mm)
Operating Temperature: -40 C to +85 C (industrial grade -I)
Microchip Technology
Core Architecture: dsPIC33 dual-core 16-bit DSC
Package: 64-pin QFN-EP (9x9 mm)
Operating Temperature: -40 C to +85 C (industrial)
Microchip Technology
Core Architecture: Dual 16-bit dsPIC33 DSC cores (master + slave)
Package: 28-pin UQFN (6 mm x 6 mm)
Microchip Technology
Core Architecture: 16-bit dsPIC33C dual-core (master + slave)
Package: 64-pin QFN (9x9 mm)
Operating Temperature: -40C to +85C (Industrial)

Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:

DSPIC33CH64MP206-I/MR

✅ Прямая замена
📦 64-QFN (9x9, MR)
same die/package, industrial -40C to +85C temp grade (-I) vs -40C to +125C (-E); all electrical specs identical

📋 Справочный аналог (нет в каталоге)

DSPIC33CH128MP206-I/PT

✅ Прямая замена ⚠️ Характеристики не проверены
Microchip Technology
📦 64-TQFP (PT)
dsPIC33CH dual-core 16-bit DSC · 100 MHz (100 MIPS) · 200 MHz (200 MIPS) · 152 KB · 16 KB · 8 KB · 8 · 12 (250 ps resolution)

✓ В наличии

$5.45 / шт.

Открыть даташит →

DSPIC33CH128MP506-I/PT

✅ Прямая замена ⚠️ Характеристики не проверены
Microchip Technology
📦 64-TQFP (PT)
Dual-core dsPIC33C DSC (master + slave) · 100 MHz · 100 MHz · 128 KB · 16 KB · 3.0 V to 3.6 V · 4x 12-bit, up to 3.5 Msps · 4 generators, 250 ps resolution

✓ В наличии

$5.62 / шт.

Открыть даташит →

DSPIC33CH512MP206-I/MR

✅ Прямая замена
Microchip Technology
📦 64-QFN (9x9, MR)
dsPIC33 dual-core 16-bit DSC · 200 MIPS (100 MHz) · 180 MIPS (90 MHz) · 512 KB · 64 KB · 64-pin QFN-EP (9x9 mm) · 3.0 V to 3.6 V (3.3 V typ.) · -40 C to +85 C (industrial)

✓ В наличии

$3.96 / шт.

Открыть даташит →

DSPIC33CK64MP206-I/MR

✅ Прямая замена
📦 64-QFN (9x9, MR)
single-core CK variant running at 100 MHz (vs 180/200 MHz dual-core); same peripherals and 64-QFN footprint

📋 Справочный аналог (нет в каталоге)

DSPIC33CH64MP202-I/2N

✅ Прямая замена
Microchip Technology
📦 28-uQFN (2N)
dsPIC33CH Dual Core Digital Signal Controllers · Dual 16-bit dsPIC33 DSC cores (master + slave) · 180 MHz · 200 MHz · Up to 200 MIPS · 88 KB (88K x 8) · 16 KB + 4 KB · 3.0 V to 3.6 V

✓ В наличии

$3.31 / шт.

Открыть даташит →

DSPIC33CH64MP206-E/MR Максимальные параметры и электрические характеристики

Product Family dsPIC33CH dual-core DSC
Core Architecture Dual dsPIC33C DSC cores (master + slave)
Master Core Speed 180 MHz (200 MIPS)
Slave Core Speed 200 MHz
Program Memory (Flash) 64 KB
Data RAM (SRAM) 8 KB
PRAM 16 KB
Operating Voltage 3.0 V to 3.6 V
Рабочая температура -40C to +125C (E grade)
Корпус 64-VFQFN exposed pad, 9x9 mm (MR)
Тип монтажа Surface Mount
ADC 12-bit, 3.5 Msps
PWM Resolution 16-bit high-resolution PWM
CAN Interface CAN FD
Уровень MSL 3 (168 hours)
Статус RoHS Compliant
Functional Safety FuSa libraries included

Конфигурация выводов DSPIC33CH64MP206-E/MR

QFN-64 (8x8mm, EP) Package Pinout Diagram QFN-64 8x8mm, P0.5mm, EP 5.1x5.1mm, JEDEC MO-220. Pin 1 by dot. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 QFN-64 (8x8mm, EP)
Контакт 1 RP60/RB0 — Remappable I/O / AN0 (ADC input)
Контакт 2 RP61/RB1 — Remappable I/O / AN1 (ADC input)
Контакт 3 RP62/RB2 — Remappable I/O / AN2 (ADC input)
Контакт 4 RP63/RB3 — Remappable I/O / AN3 (ADC input)
Контакт 5 RP64/RB4 — Remappable I/O / AN4 (ADC input)
Контакт 6 RP65/RB5 — Remappable I/O / AN5 (ADC input)
Контакт 7 RP66/RB6 — Remappable I/O / AN6 (ADC input)
Контакт 8 RP67/RB7 — Remappable I/O / AN7 (ADC input)
Контакт 9 VSS — Ground
Контакт 10 VDD
Контакт 11 RP68/RB8 — Remappable I/O / AN8 (ADC input)
Контакт 12 RP69/RB9 — Remappable I/O / AN9 (ADC input)
Контакт 13 RP70/RB10 — Remappable I/O / AN10 (ADC input)
Контакт 14 RP71/RB11 — Remappable I/O / AN11 (ADC input)
Контакт 15 RP72/RB12 — Remappable I/O / AN12 (ADC input)
Контакт 16 RP73/RB13 — Remappable I/O / AN13 (ADC input)
Контакт 17 RP74/RB14 — Remappable I/O / AN14 (ADC input)
Контакт 18 RP75/RB15 — Remappable I/O / AN15 (ADC input)
Контакт 19 VSS — Ground
Контакт 20 VDD — 3.3 V core supply
Контакт 21 PWM1H/RP48 — PWM output 1 high-side
Контакт 22 PWM1L/RP49 — PWM output 1 low-side
Контакт 23 PWM2H/RP50 — PWM output 2 high-side
Контакт 24 PWM2L/RP51 — PWM output 2 low-side
Контакт 25 PWM3H/RP52 — PWM output 3 high-side
Контакт 26 PWM3L/RP53 — PWM output 3 low-side
Контакт 27 PWM4H/RP54 — PWM output 4 high-side
Контакт 28 PWM4L/RP55 — PWM output 4 low-side
Контакт 29 CAN1TX/RP40 — CAN-FD transmit / remappable I/O
Контакт 30 CAN1RX/RP41 — CAN-FD receive / remappable I/O
Контакт 31 U1TX/RP32 — UART1 transmit / remappable I/O
Контакт 32 U1RX/RP33 — UART1 receive / remappable I/O
Контакт 33 RP76/RC0 — Remappable I/O / OSC1 (crystal in)
Контакт 34 RP77/RC1 — Remappable I/O / OSC2 (crystal out)
Контакт 35 RP78/RC2 — Remappable I/O
Контакт 36 RP79/RC3 — Remappable I/O
Контакт 37 RP80/RC4 — Remappable I/O
Контакт 38 RP81/RC5 — Remappable I/O
Контакт 39 RP82/RC6 — Remappable I/O
Контакт 40 RP83/RC7 — Remappable I/O
Контакт 41 RP84/RC8 — Remappable I/O
Контакт 42 RP85/RC9 — Remappable I/O
Контакт 43 VSS — Ground
Контакт 44 VDD — 3.3 V core supply
Контакт 45 RP86/RC10 — Remappable I/O
Контакт 46 RP87/RC11 — Remappable I/O
Контакт 47 RP88/RC12 — Remappable I/O
Контакт 48 RP89/RC13 — Remappable I/O
Контакт 49 RP90/RC14 — Remappable I/O
Контакт 50 RP91/RC15 — Remappable I/O
Контакт 51 RP92/RD0 — Remappable I/O
Контакт 52 RP93/RD1 — Remappable I/O
Контакт 53 RP94/RD2 — Remappable I/O
Контакт 54 RP95/RD3 — Remappable I/O
Контакт 55 RP96/RD4 — Remappable I/O
Контакт 56 RP97/RD5 — Remappable I/O
Контакт 57 RP98/RD6 — Remappable I/O
Контакт 58 RP99/RD7 — Remappable I/O
Контакт 59 RP100/RD8 — Remappable I/O
Контакт 60 RP101/RD9 — Remappable I/O
Контакт 61 RP102/RD10 — Remappable I/O
Контакт 62 RP103/RD11 — Remappable I/O
Контакт 63 MCLR — Master clear / reset (active low)
Контакт 64 RP56/RD7 — Remappable I/O / TMS (debug)
Контакт EP EP — Exposed thermal pad - must be soldered to ground pour

Типичное применение

DSPIC33CH64MP206-E/MR подходит для 6 применениеs: Wireless Charging Transmitter, BLDC / PMSM Motor Control (FOC), Server / Telecom SMPS, Drone Electronic Speed Controller (ESC), Digital LED Lighting Driver, Automotive Sensor Fusion ECU.

⚡

Wireless Charging Transmitter

The DSPIC33CH64MP206-E/MR is well suited to wireless charging transmitter controllers because the dual-core architecture lets the slave core execute the precise resonant-tank control loop at deterministic 200 MHz while the master runs the Qi protocol stack, foreign object detection and CAN-FD reporting to the vehicle bus. The 16-bit high-resolution PWM with 250 ps edge placement produces clean inverter switching at 100-200 kHz with sub-1% duty control, meeting the WPC1.3 EPP efficiency envelope. The integrated 12-bit 3.5 Msps ADC digitises both primary current and resonant capacitor voltage in the same cycle, enabling cycle-by-cycle phase-shift adjustment for zero-voltage switching (ZVS).

🏭

BLDC / PMSM Motor Control (FOC)

Field-Oriented Control (FOC) of a PMSM or BLDC motor requires an outer speed loop, inner current loops and space-vector PWM all running deterministically at the same control period. On the DSPIC33CH64MP206-E/MR the slave core is dedicated to the FOC inner loop while the master handles CAN-FD command reception, position-sensor feedback parsing (encoder/Hall/Resolver) and user I/O. At 200 MIPS the slave can complete a 32 kHz FOC update including Park/Clarke transforms and SVM with comfortable margin, and the 16-bit PWM provides 1 ns resolution at 1 nS tick for silent commutation. The part supports sensorless operation via the integrated ADC and on-chip op-amps for current sensing.

🖥️

Server / Telecom SMPS

High-efficiency 48 V-input server and telecom power supplies (PFC + LLC or PFC + phase-shifted full-bridge) demand tight control of multiple switching phases with sub-100 ns regulation loop latency. The DSPIC33CH64MP206-E/MR's slave core executes the average-current-mode PFC and primary-side LLC control loops while the master manages PMBus, telemetry, fan curves and secondary-side synchronous rectification timing via the high-resolution PWM. CAN FD support enables status reporting to redundant controllers. Functional Safety libraries support SIL-2 design flows for AC/DC and DC/DC converters.

✈️

Drone Electronic Speed Controller (ESC)

Multi-rotor drone ESCs require fast throttle update rates, high-resolution commutation and reliable sensorless motor startup under wide operating-temperature swings. The DSPIC33CH64MP206-E/MR delivers 200 MIPS on its slave core for 48 kHz FOC update rate with negligible jitter, while the master handles DShot/OneShot protocol parsing and battery telemetry. The -40C to +125C temperature grade covers cold-soak and high-power hover conditions. The 64-QFN 9x9 mm footprint enables ESC PCBs under 15x15 mm including FET stage.

💡

Digital LED Lighting Driver

High-end architectural and stage lighting fixtures use digital constant-current buck or boost drivers with per-channel DMX-512 or DALI control. The DSPIC33CH64MP206-E/MR's slave core generates up to 16 channels of 16-bit high-resolution PWM at frequencies suitable for dimming with no audible beating and no visible strobing on camera. The master handles DALI/DMX protocol, current-share control and temperature-compensation loops. Integrated CAN FD also allows stage fixture networks. The exposed pad on the QFN simplifies thermal management for high-channel-count designs.

🎥

Automotive Sensor Fusion ECU

ADAS sensor-fusion ECUs process IMU, radar and vehicle-bus data with bounded latency. The DSPIC33CH64MP206-E/MR supports the slave-core architectural split required by Microchip's Functional Safety libraries, isolating time-critical sensor-fusion DSP from the host processor's communications. CAN FD channels enable 2 Mbps data exchange with the chassis CAN bus. Designers targeting automotive qualification should select the AEC-Q100-qualified ordering code in the same 64-QFN package.

Сводка рекомендуемых товаров

DSPIC33CH64MP206-I/MR drop-in industrial temperature variant Используется в: Wireless Charging Transmitter, Drone Electronic Speed Controller (ESC), Automotive Sensor Fusion ECU DSPIC33CH128MP506-I/PT Microchip Technology Используется в: Wireless Charging Transmitter, Server / Telecom SMPS DSPIC33CH512MP206-I/MR Microchip Technology Используется в: BLDC / PMSM Motor Control (FOC), Server / Telecom SMPS DSPIC33CK64MP206-I/MR single-core alternative for low-end BLDC drives Используется в: BLDC / PMSM Motor Control (FOC) DSPIC33CH128MP206-I/PT Microchip Technology Используется в: Digital LED Lighting Driver
What is the DSPIC33CH64MP206-E/MR?
The DSPIC33CH64MP206-E/MR is a Microchip dual-core 16-bit Digital Signal Controller integrating a 180 MHz master and 200 MHz slave dsPIC33C core on a single die, with 64 KB Flash, 8 KB SRAM and 16 KB PRAM in a 64-pin QFN (9x9 mm) package. According to the Microchip datasheet it targets digital power conversion, motor control and other high-performance DSP applications requiring deterministic loop execution.
How fast does the DSPIC33CH64MP206-E/MR run?
The master core runs at up to 180 MHz producing 200 MIPS of execution throughput, and the dedicated slave core runs at up to 200 MHz. Both cores can execute DSP instructions in a single cycle including MAC and barrel-shift operations, allowing time-critical control loops to be offloaded from the master without task-switching overhead.
What is the operating voltage and temperature of the DSPIC33CH64MP206-E/MR?
The DSPIC33CH64MP206-E/MR operates from 3.0 V to 3.6 V across the -40C to +125C industrial temperature range (the 'E' suffix denotes the extended temperature grade). Operating outside this range can cause the on-chip voltage regulator to drop out and trigger brown-out reset; design with adequate input bulk capacitance.
What package does the DSPIC33CH64MP206-E/MR use?
The DSPIC33CH64MP206-E/MR ships in a 64-pin Very-thin QFN (VFQFN) package with an exposed thermal pad, body size 9x9 mm. The exposed pad must be soldered to a continuous ground copper pour with thermal vias to dissipate slave-core heat during sustained DSP workloads.
What is the difference between DSPIC33CH64MP206 and DSPIC33CK64MP206?
The DSPIC33CH is a dual-core family with one master and one slave dsPIC33C core, designed to split system and control code. The DSPIC33CK is a single-core variant running up to 100 MHz with similar peripherals. Choose CH when you need deterministic isolated execution of time-critical loops; choose CK when one core is sufficient and code complexity is moderate.
Where can I buy DSPIC33CH64MP206-E/MR and what does it cost?
As of 2026-09-22 the DSPIC33CH64MP206-E/MR is in stock at DigiKey, Mouser, Heisener, LCSC and MicrochipUSA with a qty-1 unit price around USD 5.96. LCSC lists a budget tier near USD 2.84, while Heisener quotes approximately USD 5.96 with 5,808 pieces on hand and ships within 5-10 days.
What is the lead time for DSPIC33CH64MP206-E/MR?
According to Heisener stock data as of 2026-09-22, the DSPIC33CH64MP206-E/MR has 5,808 pieces in inventory with an estimated delivery window of Feb 23 - Feb 28 for standard shipping; expedited shipping is also offered. DigiKey and Mouser list the part as ships-today for small quantities on their respective websites.
Is DSPIC33CH64MP206-E/MR in stock at major distributors?
Yes. As of 2026-09-22 the DSPIC33CH64MP206-E/MR is confirmed in stock at Heisener (5,808 pieces), LCSC, Mouser and DigiKey according to those distributors' product pages. Both DigiKey and Mouser list the part with ships-today availability for prototyping volumes.
DSPIC33CH64MP206 vs DSPIC33CK64MP206 - which is better for motor control?
For multi-axis motor control where the control loop and commutation logic must never be preempted, the DSPIC33CH dual-core architecture lets the slave run the FOC loop deterministically while the master handles CAN and user interface, making the CH superior. The DSPIC33CK single-core part is sufficient for single-axis drives under 20kHz serial. Choose CH for high-end ESCs and field-oriented control of multi-kW motors.
When should I choose DSPIC33CH64MP206 over a TI C2000?
Choose the DSPIC33CH64MP206 when your firmware investment is in MPLAB X, XC16 and Microchip's dsPIC ecosystem, or when you need a dual-core split for safety isolation. A TI C2000 such as the TMS320F28004x is preferable when you need higher ADC sample rate, wider PWM resolution duty steps at high switching frequency, or are integrating into TI's Code Composer toolchain.
What is the best drop-in replacement for DSPIC33CH64MP206-E/MR?
The closest pin-compatible drop-in replacements are same-family Microchip variants like DSPIC33CH64MP206-I/MR (industrial -40C to +85C) and DSPIC33CH128MP506-I/MR (more Flash in the same 64-QFN package). For a cross-brand swap to a different footprint, no true drop-in exists; a redesign is required.
Where can I download the DSPIC33CH64MP206 datasheet PDF?
The Microchip product page at https://www.microchip.com/en-us/product/dsPIC33CH64MP206 hosts the official family datasheet, and the same document is mirrored on all datasheet.com (alldatasheet), DigiKey product page and Mouser product page. Microchip also publishes the family reference manual and errata as separate documents accessible from the same product page.
Where is the DSPIC33CH64MP206-E/MR pinout diagram located?
The pinout diagram is found in the dsPIC33CH64MP206 family datasheet on page 1 (pin diagram section) and in chapter 2 (pinout tables). The 64-QFN (9x9) pinout assigns analog, PWM and communication peripherals to specific pins; consult the family datasheet before PCB layout because pin functions differ across CH package codes.
Is the DSPIC33CH64MP206-E/MR automotive grade qualified?
No, the 'E' suffix indicates an industrial extended temperature grade of -40C to +125C, not AEC-Q100 automotive qualification. For automotive applications choose the DSPIC33CH64MP206-E/MR variant qualified under Microchip's automotive flow and verified against AEC-Q100 - check the Microchip product page for the exact ordering code.
What are the key specifications of the DSPIC33CH64MP206-E/MR that engineers should know?
The DSPIC33CH64MP206-E/MR combines a 180 MHz master + 200 MHz slave dual-core DSC, 64 KB Flash, 8 KB SRAM, 16 KB PRAM, 12-bit 3.5 Msps ADC, 16-bit high-resolution PWM, CAN FD and integrated op-amps in a 64-QFN (9x9 mm) package across -40C to +125C. It targets digital power, motor control and Functional Safety applications.

Справочные инженерные данные для DSPIC33CH64MP206-E/MR — сравнение, рекомендации по проектированию и информация о соответствии.

Руководство по выбору

Choose the DSPIC33CH64MP206-E/MR when your application requires a deterministic isolated DSP loop running concurrently with a host stack - typical examples include wireless charging transmitters, multi-axis motor control, server SMPS and drone ESCs where the slave core's 200 MIPS is dedicated to the control loop. Select the DSPIC33CH64MP206-I/MR as a drop-in if you only need the -40C to +85C industrial grade. Step up to DSPIC33CH128MP206-I/PT (128 KB Flash, same TQFP footprint) or DSPIC33CH512MP206-I/MR (512 KB Flash, same QFN footprint) if you need more program space for richer protocol stacks. For single-axis BLDC drives below 20 kHz switching, the DSPIC33CK64MP206-I/MR is a more cost-effective single-core alternative in the same package. Always check whether your deployment needs the AEC-Q100 automotive variant before using this industrial E-grade part.

Сравнение с аналогами

Параметр Этот товар DSPIC33CH64MP206-I/MR DSPIC33CH128MP206-I/PT DSPIC33CH128MP506-I/PT DSPIC33CH512MP206-I/MR DSPIC33CK64MP206-I/MR DSPIC33CH64MP202-I/2N
Package 64-QFN (9x9 mm, MR) 64-QFN (9x9 mm, MR) - same 64-TQFP (PT) 64-TQFP (PT) 64-QFN (9x9 mm, MR) - same 64-QFN (9x9 mm, MR) - same 28-uQFN (2N)
Brand Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology
Core Count 2 (master + slave) 2 (master + slave) 2 (master + slave) 2 (master + slave) 2 (master + slave) 1 (single-core) 2 (master + slave)
Master Core Max Frequency 180 MHz (200 MIPS) 180 MHz (200 MIPS) 180 MHz (200 MIPS) 180 MHz (200 MIPS) 180 MHz (200 MIPS) 100 MHz 180 MHz (200 MIPS)
Flash Memory 64 KB 64 KB 128 KB 128 KB 512 KB 64 KB 64 KB
SRAM 8 KB 8 KB 16 KB 16 KB 64 KB 8 KB 8 KB
Operating Temperature -40C to +125C (E grade) -40C to +85C (I grade) -40C to +85C (I grade) -40C to +85C (I grade) -40C to +85C (I grade) -40C to +85C (I grade) -40C to +85C (I grade)
CAN Interface CAN FD CAN FD CAN FD CAN FD CAN FD CAN FD CAN FD

Ключевые отличия

  • Dual-core heterogeneous architecture with deterministic slave core (против DSPIC33CK64MP206-I/MR)
  • Extended temperature grade -40C to +125C included (против DSPIC33CH64MP206-I/MR)
  • Integrated functional safety (FuSa) libraries (против DSPIC33CK64MP206-I/MR)

Заметки по проектированию

The exposed thermal pad (EP) of the 64-QFN (9x9 mm) package must be soldered to a continuous ground copper pour and stitched with thermal vias (typically 9-16 vias on a 1.0 mm grid) to inner-ground layers. At 200 MIPS the slave core can briefly consume 150 mA during heavy DSP bursts; without the thermal pad soldered junction temperature can exceed the 150C absolute maximum within seconds of sustained DSP load, triggering thermal shutdown.

Place a 10 uF bulk capacitor plus a 100 nF decoupling capacitor on every VDD pin pair (pins 10, 20, 44 of the 64-QFN), and put a 1 uF + 100 nF combination adjacent to the analog AVDD pin. Keep analog and digital ground returns separate and join at a single point near the EP pad to prevent digital switching noise from coupling into the ADC reference. The crystal traces (OSC1/OSC2) must be guarded by ground and routed as short as possible.

Estimated: at 3.3 V VDD and 180 MHz master + 200 MHz slave, the part can draw 120-180 mA peak from VDD, so do not assume a 100 mA regulator is enough. Use a low-noise LDO such as the MCP1755 or a buck regulator with at least 300 mA rating and 33 uF output capacitance. The MCLR pin requires a 10 kohm pull-up to VDD; a floating MCLR will hold the part in reset. Programming pins PGECx/PGEDx must not be left floating during normal operation.

The PWM outputs slew at 1 ns edges; route the PWM outputs away from the analog ADC inputs and keep a ground-guard trace between them. For high-frequency PWM (>100 kHz), reduce the area of the PWM output loop by routing the high-side and low-side traces on adjacent layers with a 6 mil separation. Source-terminate PWM signals longer than 25 mm if you observe ringing above 50 MHz on the gate of the driven FET.

Информация о соответствии

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Qualified
Без свинца
Yes
Без галогенов
Yes
Конфликтные минералы
Compliant

RoHS compliant per Microchip product page. E grade = industrial extended temperature, NOT AEC-Q100; for automotive select the AEC-Q100-qualified ordering code in the same 64-QFN package. FuSa libraries are bundled but require design process documentation.

Данные проверены: 2026-09-22 — данные проверены и курируются командой компонентной инженерии XAIPART

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