Altera

EP2SGX90EF1152I3N - 90,960 Cell Stratix II GX FPGA 1.2V FC-FBGA-1152 | Altera

Артикул: EP2SGX90EF1152I3N ✗ Снят с производства

В наличии Отправка в течение 1–3 рабочих дней

1.2 V Vdss 1152-ball FC-FBGA Package 816.9 MHz Speed

От $1320 USD / шт.

MOQ: 1 |

Цена обновлена: 2026-09-08

Оптовые цены

Кол-во	Цена за ед.	Итого
1	$1850	$1.850,00
10	$1720	$17.200,00
100	$1580	$158.000,00
500	$1450	$725.000,00
1.000	$1320	$1.320.000,00

ℹ️ Все цены указаны в USD

Открыть datasheet (PDF) Смотреть аналоги

Количество

EP2SGX90EF1152I3N Обзор

The Altera (now Intel) EP2SGX90EF1152I3N is a high-density FPGA from the Stratix II GX family, integrating 90,960 logic elements and 90,960 equivalent LEs/CLBs in a 1152-ball Fine-pitch Chip-Scale BGA (FC-FBGA) package. Built on a 90 nm process technology and powered from a 1.2 V core supply, this device supports clock-tree frequencies up to 816.9 MHz and is rated for the industrial temperature grade.

What is an FPGA? A Field-Programmable Gate Array (FPGA) is a semiconductor integrated circuit composed of configurable logic blocks (CLBs), programmable interconnect, and dedicated hard IP such as transceivers, block RAM, and DSP blocks. Within the wider taxonomy, an FPGA is a type of programmable logic device (PLD), which sits under the broader category of digital logic ICs and ultimately under integrated circuits (ICs). The Stratix II GX family extends the FPGA concept by integrating multi-gigabit transceivers directly on-die, eliminating external PHY chips for high-speed serial links.

Key features of the EP2SGX90EF1152I3N include up to 4.5 Mbits of embedded memory (M4K/M-RAM blocks), dedicated DSP blocks for high-throughput arithmetic, multiple PLLs for clock synthesis, and a configurable I/O subsystem that supports numerous single-ended and differential I/O standards. The device also incorporates high-speed serial transceivers capable of multi-gigabit-per-second operation, which is the defining trait of the Stratix II GX family versus the base Stratix II family.

Architecturally, the Stratix II GX uses an adaptive logic module (ALM) fabric that packs up to eight inputs per logic element, allowing higher effective logic density than the 4-input LUT approach used in the original Stratix family. Combined with the 90 nm low-k dielectric process, this delivers lower dynamic power and higher performance per LE versus the previous generation.

Typical applications for the EP2SGX90EF1152I3N include high-speed serial interface bridging (PCI Express, Serial RapidIO, XAUI, SATA), telecom line cards, software-defined radio (SDR) baseband processing, video broadcast equipment, and ASIC prototyping. Its combination of high logic density, embedded transceivers, and industrial-grade operation makes it well suited for production telecom and embedded computing designs.

When designing with this FPGA, carefully plan the power distribution network - Stratix II GX devices require multiple supply rails (VCCINT, VCCIO, VCCA, VCCP, transceiver supplies) with strict sequencing. Use the Altera Quartus II design suite for synthesis, place-and-route, and timing closure; the -I3 speed grade and industrial temperature range support up to 816.9 MHz internal operation.

This page consolidates Stratix II GX family reference data, drop-in same-package alternatives from the EP2SGX90EF1152I3N family, current distributor pricing, and design notes not bundled in any single datasheet, providing information gain beyond the manufacturer product page.

Аналоги без доработки для EP2SGX90EF1152I3N — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с EP2SGX90EF1152I3N (тот же форм-фактор и посадочное место) — отличается по Package, Operating Temperature, Operating Temperature Grade, Transceivers, Total RAM Bits.

EP2SGX90EF1152C3N

Intel

Operating Temperature: 0C to +85C (Commercial)