10AS057K2F35I2SG vs 10AS057K2F35E1HG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS057K2F35I2SG sa pamamagitan ng Intel at 10AS057K2F35E1HG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
10AS057K2F35E1HG - Arria 10 SX SoC FPGA, 570K LE, 1152-FBGA | Intel
10AS057K2F35E1HG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AS057K2F35I2SG | 10AS057K2F35E1HG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX |
| Logic Elements | 570K | 570,000 |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Core Frequency | 1.5 GHz | — |
| Speed Grade | -2 | — |
| Packhaging | 1152-ball FC-FBGA (F35), 35x35 mm | 1152-ball FC-BGA (F35), 35x35 mm |
| Temperature na Operasyon | -40C to +100C (Industrial) | — |
| User I/O Count | 396 (per Heisener parametric data) | — |
| Process Node | 20 nm TSMC | — |
| Transceivers | [DATA_NEEDED: transceiver count and max data rate] | 24 (up to 17.4 Gbps) |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Embedded Memory | [DATA_NEEDED: M20K / MLAB bit count] | 29.4 Mbits (M20K + MLAB) |
| HPS Peripherals | EMAC, USB 2.0 OTG, SPI, I2C, NAND/NOR flash controllers, SD/MMC | — |
| Memory Interfaces | DDR3/DDR4/LPDDR3 hard controllers (Arria 10 HPS) | — |
| Configuration | FPGA + HPS independent / coordinated boot | — |
| Tindminan RoHS | Compliant (lead-free finish) | Compliant |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Level ng MSL | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | — |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| DSP Blocks (18x19 Multipliers) | — | 1,566 |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 1.5 GHz |
| PCIe Hard IP | — | Gen2/Gen3 x8 |
| Memory Interfaces (FPGA side) | — | DDR4, DDR3, LPDDR3, QDR IV, RLDRAM 3 |
| Memory Interfaces (HPS side) | — | DDR4, DDR3, LPDDR3 |
| Process Technology | — | 20 nm TSMC |
| Operating Temperature Grade | — | Industrial |
| Supply Voltage (Core) | — | [DATA_NEEDED: Vcore] |