10AS057K2F35I2SG vs 10AS057K2F35E1HG 比較
詳細並排比較 10AS057K2F35I2SG 由 Intel 與 10AS057K2F35E1HG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 10AS057K2F35I2SG | 10AS057K2F35E1HG |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX |
| Logic Elements | 570K | 570,000 |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Core Frequency | 1.5 GHz | — |
| Speed Grade | -2 | — |
| 封裝 | 1152-ball FC-FBGA (F35), 35x35 mm | 1152-ball FC-BGA (F35), 35x35 mm |
| 工作溫度 | -40C to +100C (Industrial) | — |
| User I/O Count | 396 (per Heisener parametric data) | — |
| Process Node | 20 nm TSMC | — |
| Transceivers | [DATA_NEEDED: transceiver count and max data rate] | 24 (up to 17.4 Gbps) |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Embedded Memory | [DATA_NEEDED: M20K / MLAB bit count] | 29.4 Mbits (M20K + MLAB) |
| HPS Peripherals | EMAC, USB 2.0 OTG, SPI, I2C, NAND/NOR flash controllers, SD/MMC | — |
| Memory Interfaces | DDR3/DDR4/LPDDR3 hard controllers (Arria 10 HPS) | — |
| Configuration | FPGA + HPS independent / coordinated boot | — |
| RoHS 狀態 | Compliant (lead-free finish) | Compliant |
| 安裝類型 | Surface Mount (BGA) | — |
| MSL 等級 | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | — |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| DSP Blocks (18x19 Multipliers) | — | 1,566 |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 1.5 GHz |
| PCIe Hard IP | — | Gen2/Gen3 x8 |
| Memory Interfaces (FPGA side) | — | DDR4, DDR3, LPDDR3, QDR IV, RLDRAM 3 |
| Memory Interfaces (HPS side) | — | DDR4, DDR3, LPDDR3 |
| Process Technology | — | 20 nm TSMC |
| Operating Temperature Grade | — | Industrial |
| Supply Voltage (Core) | — | [DATA_NEEDED: Vcore] |