10AX090U3F45I2SG vs 10AX090U3F45E2LG Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng 10AX090U3F45I2SG sa pamamagitan ng Altera at 10AX090U3F45E2LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro 10AX090U3F45I2SG 10AX090U3F45E2LG
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Family Arria 10 GX —
Logic Elements 900000 —
Embedded Memory Bits 59234304 59,234,304 bits
Number of User I/O 480 —
Process Technology 20nm 20nm TSMC
Core Voltage 0.9 V —
Packhaging 1932-BBGA, FCBGA (F45) 1932-BBGA, FCBGA
Number of Terminals 1932 —
Terminal Form BALL —
Package Shape SQUARE —
Operating Temperature Grade INDUSTRIAL OTHER / Extended (per Partstack listing)
Transceivers Up to 28.05 Gbps —
DSP Blocks Variable-precision multipliers [DATA_NEEDED: DSP block count]
Uri ng Pagpapasok Surface Mount (BGA) —
Compliance RoHS compliant per Altera product page —
Series — Arria 10 GX
Logic Elements (LE) — 900,000
Number of Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Number of Transceivers — 48 transceiver macro channels (480 I/O references)
Maximum Transceiver Data Rate — [DATA_NEEDED: exact Gbps]
Hard Memory Controllers — Yes - DDR4, DDR3, QDR IV, RLDRAM 3 with hardened PHY
Hard PCIe Controllers — PCIe Gen3 x8
Hard Ethernet MACs — 10GbE and 100GbE MACs
Adaptive Logic Modules (ALMs) — [DATA_NEEDED: ALM count]
Number of I/O Banks — [DATA_NEEDED: bank count]
Maximum User I/O Pins — 480 (per DigiKey listing)
Package Pin Pitch — [DATA_NEEDED: pitch]
Configuration Method — Serial (active/passive) and parallel via Quartus Prime
Tindminan RoHS — Compliant
Development Tool — Intel Quartus Prime

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