10AX090U3F45I2SG vs 10AX090U3F45E2LG 比較
詳細並排比較 10AX090U3F45I2SG 由 Altera 與 10AX090U3F45E2LG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 10AX090U3F45I2SG | 10AX090U3F45E2LG |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Arria 10 GX | — |
| Logic Elements | 900000 | — |
| Embedded Memory Bits | 59234304 | 59,234,304 bits |
| Number of User I/O | 480 | — |
| Process Technology | 20nm | 20nm TSMC |
| Core Voltage | 0.9 V | — |
| 封裝 | 1932-BBGA, FCBGA (F45) | 1932-BBGA, FCBGA |
| Number of Terminals | 1932 | — |
| Terminal Form | BALL | — |
| Package Shape | SQUARE | — |
| Operating Temperature Grade | INDUSTRIAL | OTHER / Extended (per Partstack listing) |
| Transceivers | Up to 28.05 Gbps | — |
| DSP Blocks | Variable-precision multipliers | [DATA_NEEDED: DSP block count] |
| 安裝類型 | Surface Mount (BGA) | — |
| Compliance | RoHS compliant per Altera product page | — |
| Series | — | Arria 10 GX |
| Logic Elements (LE) | — | 900,000 |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Number of Transceivers | — | 48 transceiver macro channels (480 I/O references) |
| Maximum Transceiver Data Rate | — | [DATA_NEEDED: exact Gbps] |
| Hard Memory Controllers | — | Yes - DDR4, DDR3, QDR IV, RLDRAM 3 with hardened PHY |
| Hard PCIe Controllers | — | PCIe Gen3 x8 |
| Hard Ethernet MACs | — | 10GbE and 100GbE MACs |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Number of I/O Banks | — | [DATA_NEEDED: bank count] |
| Maximum User I/O Pins | — | 480 (per DigiKey listing) |
| Package Pin Pitch | — | [DATA_NEEDED: pitch] |
| Configuration Method | — | Serial (active/passive) and parallel via Quartus Prime |
| RoHS 狀態 | — | Compliant |
| Development Tool | — | Intel Quartus Prime |