10AX115N3F40I2SG vs 10AX115N4F40I3SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AX115N3F40I2SG sa pamamagitan ng Intel at 10AX115N4F40I3SG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
10AX115N3F40I2SG - Arria 10 GX FPGA, 1.15M LE, 1517-FCBGA | Intel
10AX115N3F40I2SG ✓ NakahandaIntel
10AX115N4F40I3SG - Arria 10 GX 1150K LE FPGA | Intel | 1517-FCBGA
10AX115N4F40I3SG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AX115N3F40I2SG | 10AX115N4F40I3SG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Arria 10 GX | — |
| Logic Elements | 1,150,000 | — |
| Embedded Memory | 68,857,856 bits (68.86 Mbits) | — |
| User I/Os | 600 | — |
| DSP Blocks | 1,518 (18x19 multipliers) | [DATA_NEEDED: DSP block count] |
| Transceivers | 24 channels | — |
| Max Transceiver Data Rate | 17.4 Gbps | — |
| Process Technology | 20 nm TSMC | — |
| Core Voltage | 0.9 V | — |
| Packhaging | 1517-BBGA, FCBGA (F40) | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch |
| Operating Temperature Grade | Industrial | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | Compliant | Compliant |
| Configuration Memory | SRAM-based (volatile, requires external config device) | — |
| Hard Memory Controllers | DDR4 up to 1600 Mbps | — |
| Family | — | Arria 10 GX |
| Logic Elements (LE) | — | 1,150,000 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory Bits | — | 68,857,856 |
| Maximum User I/O | — | 600 |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| Process Node | — | 20 nm |
| Temperature na Operasyon | — | -40C to +100C (Industrial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCC core voltage] |
| Configuration | — | Serial, Parallel, and Avalon-ST supported |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |
| Hardened IP | — | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) |
| Device Family Position | — | Mid-range 20 nm transceiver FPGA |