10M08SAU324I7G vs 10M08SCU169I7G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10M08SAU324I7G sa pamamagitan ng Intel at 10M08SCU169I7G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 10M08SAU324I7G | 10M08SCU169I7G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX 10 FPGA | MAX 10 |
| Logic Elements (LE) | 8000 | 8,000 |
| Embedded User Flash | 387,072 bits | 387,072 bits (48 KB) |
| General Purpose SRAM | 246 Kbits | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: multiplier count] | — |
| PLLs | 2 (with up to 4 output taps) | — |
| Maximum User I/O Pins | 250 | — |
| On-chip ADC | Dual 12-bit, 1 MSPS | — |
| Core Voltage (VCC) | 1.2 V | — |
| Supply Voltage na Operasyon | 3 V / 3.3 V | — |
| Packhaging | 324-LFBGA (UBGA-324), 15x15 mm | 169-ball UFBGA / UBGA (U169), 11 mm x 11 mm, 0.65 mm pitch |
| Configuration Memory | On-die flash (non-volatile) | Internal flash (non-volatile, dual-boot) |
| Configuration Interface | JTAG (IEEE 1149.1), Active Serial | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | -40 C to +100 C (industrial, suffix I7G) |
| Tindminan RoHS | Compliant | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Embedded Memory (M9K blocks) | — | [DATA_NEEDED: M9K count and total bits] |
| User I/O Count | — | 130 |
| Maximum User I/O (package) | — | 130 (U169) |
| Core Voltage (VCCINT) | — | 1.2 V |
| Process Technology | — | TSMC 55 nm embedded flash |
| PLL Count | — | [DATA_NEEDED: number of PLLs] |
| Global Clock Networks | — | [DATA_NEEDED: global clock count] |
| DSP Blocks (18x18 multipliers) | — | [DATA_NEEDED: multiplier count] |
| ADC | — | 12-bit, 1 MSPS, 4 channels (single supply variant) |
| Lead-Free / RoHS | — | Yes / Compliant |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |
| Configuration Method | — | JTAG, internal flash, dual-boot |
| Supported I/O Standards | — | LVCMOS, LVTTL, LVDS, SSTL, HSTL, PCI |