10M08SAU324I7G vs 10M08SCU169I7G Vergleich
Detaillierter Direktvergleich von 10M08SAU324I7G von Intel und 10M08SCU169I7G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 10M08SAU324I7G | 10M08SCU169I7G |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $23,40 | $9,85 |
| Family | MAX 10 FPGA | MAX 10 |
| Logic Elements (LE) | 8000 | 8,000 |
| Embedded User Flash | 387,072 bits | 387,072 bits (48 KB) |
| General Purpose SRAM | 246 Kbits | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: multiplier count] | — |
| PLLs | 2 (with up to 4 output taps) | — |
| Maximum User I/O Pins | 250 | — |
| On-chip ADC | Dual 12-bit, 1 MSPS | — |
| Core Voltage (VCC) | 1.2 V | — |
| Betriebsversorgungsspannung | 3 V / 3.3 V | — |
| Gehäuse | 324-LFBGA (UBGA-324), 15x15 mm | 169-ball UFBGA / UBGA (U169), 11 mm x 11 mm, 0.65 mm pitch |
| Configuration Memory | On-die flash (non-volatile) | Internal flash (non-volatile, dual-boot) |
| Configuration Interface | JTAG (IEEE 1149.1), Active Serial | — |
| Betriebstemperatur | -40C to +100C (Industrial) | -40 C to +100 C (industrial, suffix I7G) |
| RoHS-Status | Compliant | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Embedded Memory (M9K blocks) | — | [DATA_NEEDED: M9K count and total bits] |
| User I/O Count | — | 130 |
| Maximum User I/O (package) | — | 130 (U169) |
| Core Voltage (VCCINT) | — | 1.2 V |
| Process Technology | — | TSMC 55 nm embedded flash |
| PLL Count | — | [DATA_NEEDED: number of PLLs] |
| Global Clock Networks | — | [DATA_NEEDED: global clock count] |
| DSP Blocks (18x18 multipliers) | — | [DATA_NEEDED: multiplier count] |
| ADC | — | 12-bit, 1 MSPS, 4 channels (single supply variant) |
| Lead-Free / RoHS | — | Yes / Compliant |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |
| Configuration Method | — | JTAG, internal flash, dual-boot |
| Supported I/O Standards | — | LVCMOS, LVTTL, LVDS, SSTL, HSTL, PCI |