5CSEBA5U23A7N vs 5CSEBA5U23C7SN Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA5U23A7N sa pamamagitan ng Altera at 5CSEBA5U23C7SN sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro 5CSEBA5U23A7N 5CSEBA5U23C7SN
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Family Cyclone V SE SoC FPGA Cyclone V SE SoC FPGA
Logic Elements 85 K 85,000 LE
Hard Processor System Dual ARM Cortex-A9 MPCore with CoreSight —
HPS Maximum Frequency 925 MHz —
FPGA Fabric Speed Grade 7 —
User I/O Count 145 —
Embedded Memory 4,450 Kbits (approximate) —
DSP Blocks (18x18) 87 —
PLLs 6 (approximate, per device family) —
Packhaging 672-UBGA (23x23 mm) 672-pin UBGAMM (UBGA 23x23 mm)
Process Technology 28 nm low-power —
Configuration Method Serial (EPCS) or parallel flash with AES-128/256 —
Operating Temperature Grade Automotive / -40C to +125C (per Altera ordering code 'A') —
Uri ng Pagpapasok Surface Mount (BGA) —
Level ng MSL 3 (per JEDEC J-STD-020, typical for BGA packages) —
Tindminan RoHS Compliant Compliant
Processor — Single ARM Cortex-A9 MPCore with CoreSight
Processor Frequency — 800 MHz
Adaptive Logic Modules (ALMs) — 32,070
Registers — [DATA_NEEDED: register count]
Memory (Embedded) — 4,050 Kbits M10K + 636 Kbits MLAB
DSP Blocks — [DATA_NEEDED: DSP block count]
Transceivers — Up to 6 (3.125 Gbps)
PCIe Hard IP — Gen2 x1/x2/x4
Hard Memory Controller — DDR3, DDR3L, LPDDR2, LPDDR3
HPS L1 Cache — 32 KB I-cache + 32 KB D-cache per core
HPS L2 Cache — 512 KB shared
Supply Voltage (Core) — 1.1 V
Temperature na Operasyon — -40C to +85C (industrial, speed grade 7)
Process Node — 28 nm low-power

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