5M240ZT100I5N vs 5M160ZE64I5N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng 5M240ZT100I5N sa pamamagitan ng Altera at 5M160ZE64I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro 5M240ZT100I5N 5M160ZE64I5N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Family MAX V —
Series 5M240Z —
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements 240 —
Macrocells 192 128
User Flash Memory 8 Kbit 4.0 Kbits
Maximum User I/O 114 —
User I/O Pins (per datasheet) 79 —
Bilang ng Pins 100 —
Package Type TQFP-100 (T100) —
Package Body Size 14 x 14 mm —
Lead Pitch 0.50 mm —
Core Voltage (VCCINT) 1.8 V —
I/O Bank Voltage (VCCIO) 1.2 V to 3.3 V (bank-dependent) —
Speed Grade -5 —
Maximum Internal Frequency 118.3 MHz —
Pin-to-Pin Delay (tPD1) 7.5 ns (per datasheet header) —
Temperature na Operasyon -40 C to +100 C (Industrial) -40C to +100C (Industrial)
Programming Interface JTAG (IEEE 1149.1) / ISP —
Configuration Memory Non-volatile flash (instant-on) —
Uri ng Pagpapasok Surface Mount Surface Mount
Lead-Free / RoHS Yes (LEAD FREE per datasheet header) —
Level ng MSL [DATA_NEEDED: MSL Level] —
AEC-Q100 Automotive Not qualified (Industrial grade) —
Device Family — MAX V
Logic Elements (LEs) — 160
Maximum User I/O Pins — 79
Pin-to-Pin Logic Delay (tPD) — 7.5 ns
Logic Array Blocks (LABs) — 4
Supply Voltage - Core — 3.3 V or 2.5 V
I/O Bank Voltages — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Packhaging — 64-pin EQFP (Exposed Pad)
JTAG Support — Yes (IEEE 1149.1, TMS/TDI/TDO/TCK)
Differential I/O — LVDS, RSDS, mini-LVDS, LVPECL (emulated)
Configuration — Non-volatile on-chip flash, instant-on
Tindminan RoHS — Compliant

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