5M40ZM64C4 vs 5M40ZM64C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M40ZM64C4 sa pamamagitan ng Altera at 5M40ZM64C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M40ZM64C4 | 5M40ZM64C4N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V |
| Logic Elements (LEs) | 40 | — |
| Macrocells | 32 | — |
| Logic Array Blocks (LABs) | 2 | — |
| Maximum User I/O Pins | 30 (52 device max) | — |
| Maximum Frequency (fMAX) | 184.1 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V (internal) | — |
| I/O Voltage (VCCIO) | 1.2 V to 3.3 V | — |
| Embedded Memory (UFM) | 8 Kbits | — |
| Packhaging | 64-ball MBGA (Micro BGA), 0.5 mm pitch | 64-MBGA (Micro FineLine BGA), 4.5 x 4.5 mm |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial, C4 speed grade) | 0 °C to +85 °C (commercial) |
| Programming | JTAG (IEEE 1149.1), internal flash non-volatile | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Logic Elements | — | 40 |
| Macro Cells | — | 32 |
| Number of I/O Pins | — | 30 (max user I/O) |
| Number of Logic Array Blocks | — | 2 LABs (16 macrocells each) |
| Core Voltage VCCINT | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Voltage VCCIO | — | 1.2 V to 3.3 V (multi-voltage) |
| Maximum Internal Frequency | — | 184.1 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 7.5 ns |
| Propagation Delay (max) | — | 7.5 ns |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Configuration Memory | — | Flash (non-volatile, instant-on) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |