5M40ZM64C4 vs 5M40ZM64C4N 比較

詳細並排比較 5M40ZM64C4 由 Altera 與 5M40ZM64C4N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5M40ZM64C4 5M40ZM64C4N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family MAX V MAX V
Logic Elements (LEs) 40 —
Macrocells 32 —
Logic Array Blocks (LABs) 2 —
Maximum User I/O Pins 30 (52 device max) —
Maximum Frequency (fMAX) 184.1 MHz —
Pin-to-Pin Propagation Delay (tPD) 7.5 ns —
Core Voltage (VCCINT) 1.8 V (internal) —
I/O Voltage (VCCIO) 1.2 V to 3.3 V —
Embedded Memory (UFM) 8 Kbits —
封裝 64-ball MBGA (Micro BGA), 0.5 mm pitch 64-MBGA (Micro FineLine BGA), 4.5 x 4.5 mm
工作溫度 0 °C to +85 °C (Commercial, C4 speed grade) 0 °C to +85 °C (commercial)
Programming JTAG (IEEE 1149.1), internal flash non-volatile —
RoHS 狀態 Compliant Compliant
Lead-Free Yes —
Logic Elements — 40
Macro Cells — 32
Number of I/O Pins — 30 (max user I/O)
Number of Logic Array Blocks — 2 LABs (16 macrocells each)
Core Voltage VCCINT — 1.8 V (1.71 V to 1.89 V)
I/O Voltage VCCIO — 1.2 V to 3.3 V (multi-voltage)
Maximum Internal Frequency — 184.1 MHz
Pin-to-Pin Logic Delay (tPD) — 7.5 ns
Propagation Delay (max) — 7.5 ns
安裝類型 — Surface Mount (BGA)
Configuration Memory — Flash (non-volatile, instant-on)
Programming Interface — JTAG (IEEE 1149.1) / ISP
MSL 等級 — [DATA_NEEDED: MSL rating]

資料表與資源

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