A3PE3000L-1FGG896M vs A3PE3000L-FGG896M Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A3PE3000L-1FGG896M sa pamamagitan ng Microchip Technology at A3PE3000L-FGG896M sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A3PE3000L-1FGG896M - 3M Gate ProASIC3L Low Power FPGA | Microchip
A3PE3000L-1FGG896M ✓ NakahandaMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A3PE3000L-1FGG896M | A3PE3000L-FGG896M |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | ProASIC3L (Flash FPGA) | ProASIC3L (Flash-based FPGA) |
| System Gates | 3000000 | 3,000,000 |
| Logic Elements | 35 KLEs (per Mouser listing) | — |
| Number of I/O | 620 | — |
| Total Memory Bits (DigiKey listing) | 516096 | — |
| Core Voltage | 1.2 V to 1.5 V | 1.2 V to 1.5 V |
| Process Technology | 130 nm Flash | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Configuration Technology | Flash (nonvolatile, single-chip) | — |
| Low Power Feature | Flash*Freeze technology | — |
| Packhaging | 896-ball FBGA | 896-ball FBGA (FGG896), 1 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Supply Voltage - I/O | as low as 1.2 V (per Microchip product page) | — |
| Speed Grade | -1 | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0 to 70 C |
| Moisture Sensitivity | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Logic Cells | — | 75,264 |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Volte ng Pagbibigay | — | 1.5 V |
| Logic Family | — | CMOS |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |