AD7091R-2BRUZ vs LTC2313HTS8-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng AD7091R-2BRUZ sa pamamagitan ng Analog Devices at LTC2313HTS8-14 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2313HTS8-14 - 14-bit 2.5Msps SAR ADC in TSOT-23-8 | Analog Devices
LTC2313HTS8-14 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | AD7091R-2BRUZ | LTC2313HTS8-14 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 12 bits | 14 bits |
| Number of Channels | 2 | — |
| Rate ng Pagkupita | 1 MSPS | — |
| Input Type | Single-ended | Pseudo-differential (IN+, IN-) |
| Volte ng Pagbibigay | 2.7 V to 5.25 V | 3 V to 5 V (single supply, 5 V typical) |
| Power Consumption | 1.4 mW at 1 MSPS (typical) | — |
| Power-Down Current | 550 nA typical at VDD = 5.25 V, 435 nA typical at VDD = 3 V | — |
| Input Bandwidth | 1.5 MHz (track-and-hold) | — |
| Reference Type | Internal 2.5 V | — |
| Interface | SPI | — |
| Packhaging | 16-lead TSSOP | TSOT-23-8 (HTS8) |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40 °C to +125 °C (H-grade) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Number of Inputs | 2 | — |
| Sample Rate | — | 2.5 Msps |
| Architecture | — | SAR (Successive Approximation Register) |
| Number of Input Channels | — | 1 (single-ended/differential) |
| Kuru-kuryente ng Pagbibigay | — | 5 mA at 2.5 Msps |
| Internal Reference | — | 2.5 V nominal, 20 ppm/°C max drift |
| Serial Interface | — | SPI-compatible SCK/SDO/SDI/CSF, supports 1.8 V/2.5 V/3 V/5 V logic |
| No-Missing-Codes Performance | — | 14 bits guaranteed |
| Latency | — | 0 conversion latency |
| Level ng MSL | — | 1 (per JEDEC J-STD-020) |
| Conversion Cycles | — | 16 SCK per conversion (14-bit plus 2 dummy bits) |