ADS62P23IRGC25 vs ADC1213D080HN-C18 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng ADS62P23IRGC25 sa pamamagitan ng Texas Instruments at ADC1213D080HN-C18 sa pamamagitan ng Renesas Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Texas Instruments
ADS62P23IRGC25 - Dual 12-bit 80MSPS ADC, DDR LVDS/CMOS | TI
ADS62P23IRGC25 ✓ NakahandaRenesas Electronics
ADC1213D080HN-C18 - 12-bit 80MSPS Dual ADC with JESD204A | Renesas
ADC1213D080HN-C18 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | ADS62P23IRGC25 | ADC1213D080HN-C18 |
|---|---|---|
| Brand | Texas Instruments | Renesas Electronics |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Manufacturer | Texas Instruments | — |
| Pangangasiwaan | 12 bit | 12 bit |
| Number of Channels | 2 (dual) | 2 (dual, simultaneous sampling) |
| Sampling Rate (Max) | 80 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Output Interface | DDR LVDS or Parallel CMOS (selectable) | — |
| Input Type | Differential analog inputs | Differential / single-ended (configurable) |
| Max Analog Input Voltage | 2 V | — |
| Packhaging | 64-VQFN (RGC) 9x9 mm | 56-VFQFPN exposed pad (8x8 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Hanay ng Temperature na Operasyon | -40C to +85C (industrial) | -40 C to +85 C (industrial) |
| Internal Reference | Yes (external reference also supported) | — |
| Family Member Context | ADS62P2X family (65/80/105/125 MSPS versions) | — |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | 3 (168 hours) | 3 (per JEDEC J-STD-020) |
| Product Family | ADS62P2X | — |
| Sampling Rate per Channel | — | 80 MSPS |
| Data Output Interface | — | JESD204A (serial, up to 3.125 Gbps lane) |
| Analog Supply Voltage (AVDD) | — | 1.8 V |
| Digital/Drive Supply Voltage (DRVDD) | — | 3.3 V |
| Input Bandwidth | — | [DATA_NEEDED: full-power input bandwidth MHz] |
| SNR | — | [DATA_NEEDED: SNR dBFS at fIN] |
| ENOB | — | [DATA_NEEDED: ENOB bits at fIN] |
| SFDR | — | [DATA_NEEDED: SFDR dBc] |
| Power Consumption | — | [DATA_NEEDED: power mW per channel at 80 MSPS] |
| Configuration Interface | — | SPI-compatible serial |
| Lead-Free | — | Yes |