AFS600-1FG256K vs AFS600-FG256 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng AFS600-1FG256K sa pamamagitan ng Microchip Technology at AFS600-FG256 sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
AFS600-1FG256K - 600K Fusion Mixed-Signal FPGA | Microchip
AFS600-1FG256K ✓ NakahandaMicrochip Technology
AFS600-FG256 - 600K Mixed-Signal Fusion FPGA | Microchip
AFS600-FG256 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | AFS600-1FG256K | AFS600-FG256 |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Type | Fusion mixed-signal field-programmable gate array (FPGA) | FPGA |
| Programmable Logic | Flash-based programmable logic | — |
| Equivalent System Gates | 600,000 gates | — |
| Logic Cells | 13,824 logic cells | — |
| User I/O | 119 I/O | — |
| Maximum Frequency | 1282.05 MHz | 1098.9 MHz |
| Core Supply Voltage | 1.5 V | — |
| Integrated Analog | Configurable analog resources | — |
| Embedded Memory | Large flash memory blocks | 110,592 bits |
| Clock Management | Comprehensive clock generation and management circuitry | — |
| Packhaging | 256-terminal plastic ball grid array (256-LBGA) | — |
| Terminal Count | 256 terminals | — |
| Package Shape | Square | — |
| Terminal Pitch | 1.00 mm | — |
| Package Dimensions | 17 mm x 17 mm | — |
| Uri ng Pagpapasok | Surface mount | — |
| Ordering Package Option | Tray | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Product Type | — | Fusion mixed-signal FPGA |
| System Gates | — | 600,000 gates |
| User I/O Count | — | 119 I/Os |
| Volte ng Pagbibigay | — | 1.5 V |
| Logic Family | — | CMOS |
| Process Technology | — | 130 nm |
| Metal Layers | — | 7 layers |
| Configuration Memory | — | Nonvolatile flash-based CMOS |
| Power-Up Behavior | — | Live at Power-Up (LAPU) |
| Package Type | — | 256-pin low-profile BGA |
| Package Pitch | — | 1.0 mm |
| Bilang ng Pin | — | 256 pins |
| Temperature na Operasyon | — | 0 C to 70 C |
| Analog Capability | — | Configurable analog blocks |
| Clock Capability | — | Integrated clock generation and management circuitry |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification status] |