EP1810LC-20 vs EP1810LC-45 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1810LC-20 sa pamamagitan ng Intel at EP1810LC-45 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP1810LC-45 - 900-Gate Classic EPLD, 48 Macro Cells, PLCC-68 | Intel
EP1810LC-45 ObsoletePagsanggunian na paghahambing
| Parametro | EP1810LC-20 | EP1810LC-45 |
|---|---|---|
| Brand | Intel | Rochester Electronics |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Classic EPLD | Altera Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | 900 | 900 |
| Macrocells | 48 | — |
| Maximum Operating Frequency | 50 MHz | 22.2 MHz |
| Propagation Delay (tPD) | 20 ns | — |
| Volte ng Pagbibigay | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS EPROM | — |
| Programmability | UV-Erasable / OTP | — |
| Dedicated Inputs | 12 | — |
| Packhaging | 68-pin PLCC | 68-pin PLCC (J-lead) |
| Package Suffix | LC (PLCC, windowed for UV erase on L variant) | — |
| Speed Grade | 20 ns (commercial) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 °C to +70 °C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (PLCC socket compatible) |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status of Rochester-sourced part] |
| Macro Cells | — | 48 |
| Maximum Inputs | — | 64 |
| Maximum Outputs | — | 48 |
| Logic Array Blocks | — | 4 |
| Propagation Delay (tpd) | — | 45 ns |
| Supply Voltage (Vcc) | — | 5 V (±5%) |
| Process Technology | — | 5 V CMOS EPROM |
| Lead-Free | — | [DATA_NEEDED: lead-free finish] |