EP1810LC-25T vs EP1810LC-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1810LC-25T sa pamamagitan ng Intel at EP1810LC-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1810LC-25T | EP1810LC-20 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Altera Classic EP1810 | Classic EPLD |
| Device Type | EPLD (Erasable/OTP Complex PLD) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 48 (4 quadrants x 12 macrocells) | 48 |
| Usable Gates | Approx. 900 | 900 |
| Dedicated Inputs | 16 | 12 |
| Bidirectional I/O Pins | 48 | — |
| External Clocks | 4 | — |
| Propagation Delay (tPD) | 25 ns | 20 ns |
| Supply Voltage (VCC) | 5 V nominal | — |
| Temperature na Operasyon | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) |
| Packhaging | 28-pin J-lead PLCC (Plastic Leaded Chip Carrier) | 68-pin PLCC |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Technology | CMOS, UV-erasable / OTP | CMOS EPROM |
| I/O Standard | TTL-compatible 5 V | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status - confirm with manufacturer] | [DATA_NEEDED: rohs status] |
| Programming Tool | Altera MAX+PLUS II / Quartus Classic | — |
| Maximum Operating Frequency | — | 50 MHz |
| Volte ng Pagbibigay | — | 5 V (4.75 V to 5.25 V) |
| Programmability | — | UV-Erasable / OTP |
| Package Suffix | — | LC (PLCC, windowed for UV erase on L variant) |
| Speed Grade | — | 20 ns (commercial) |